Commit Graph

15166 Commits

Author SHA1 Message Date
Guillaume Gautier
d15f3448b5 drivers: adc: Update ADC driver for STM32WBA series
Update ADC driver for STM32WBA series

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-12 11:48:10 +02:00
Erwan Gouriou
829fa5e70a drivers: counter: stm32wba: Avoid warning at build
STM32WBA LL API defines non const TIM_TypeDef.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-07-12 11:48:10 +02:00
Marek Pieta
1601725354 drivers: sensor: qdec_nrfx: Workaround spurious samplerdy event
The underlying HAL driver may improperly forward an samplerdy event even
if it's disabled in the configuration. Ignore the event to prevent error
logs until the issue is fixed in HAL.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2023-07-12 10:16:41 +02:00
Declan Snyder
bb74b311fe drivers: dma_mcux_lpc: remove SDK based macro
remove the sdk based TOTAL_DMA_CHANNELS macro and instead just use the
zephyr driver's num_of_channels field

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-07-12 09:26:58 +02:00
Florian Grandel
5c4ec518ab driver: rtc: rtc_emul: remove redundant brackets
Change due to review comment: remove redundant brackets for pointer
value access.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-12 09:26:16 +02:00
Florian Grandel
ff2b5cebb7 drivers: rtc: rtc_emul: replace mutex with spinlock
Replaces the mutex with a lightweight spinlock.

Fixes: #59901

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-12 09:26:16 +02:00
Elisabeth Friedrich
f4356f3b2e drivers: lpadc: fix ADC command chaining
When reading multiple ADC channel in parallel, an ADC command chain will be
build. This is similar to a linked list, as every command references the
next command.

Before this patch every ADC command after the first, would always reference
this initial command. So that during execution only two commands (the last
and first) would be executed which resulted in readout of only two analog
values. As Zephyr expected more to come in, the `read_adc` function would
block endlessly.

The patch fixes the behaviour and allows a correct chain to build up.

Signed-off-by: Elisabeth Friedrich <auxsys@flowerpot.me>
2023-07-12 09:25:44 +02:00
Fabio Baltieri
5ea3f9a24e drivers: pcie: initialize after interrupt controllers
PCIe devices refer to interrupt nodes, but are initialized with the same
priority, making the sequence depending on the linking order. Add a new
symbol and set it to one unit after intc to ensure that the
initialization sequence is stable.

Found with:

west build -p -b qemu_cortex_a53 \
	samples/drivers/virtualization/ivshmem/doorbell \
	-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pcie@4010000000 PRE_KERNEL_1 40 <
	/soc/interrupt-controller@8000000/its@8080000 POST_KERNEL 40

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-12 09:25:35 +02:00
Fabio Baltieri
c2d049f56e intc_gicv3_its: anticipate initialization priority
The intc_gicv3_its driver is currently initializing in POST_KERNEL, but
PCIe device nodes depends on it and are initialized earlier. Change the
init level to PRE_KERNEL_1 to sort that out, and also put the driver in
line with other interrupt controller drivers.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-12 09:25:35 +02:00
Tristan Honscheid
8fd1ce7579 emul: Only add enabled DT nodes to bus emulators
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.

Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-07-12 09:25:18 +02:00
L Lakshmanan
934c6d7b33 drivers: mm: Fix cast warnings on build for RAT
Removed the unneccessary casts in the functions to remove warnings
during build for SoCs using RAT. Functionality reamins the same,
tested on board.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-11 18:20:26 +00:00
Tim-Marek Thomas
5d75940ae3 boards: riscv: neorv32: Updates compatibility to neoverse v1.8.6
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).

Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
2023-07-11 18:19:55 +00:00
Alvaro Garcia
b7f9fb8f82 drivers: added support for clock PCF8563
Added driver support

Signed-off-by: Alvaro Garcia <maxpowel@gmail.com>
2023-07-11 16:14:49 +02:00
Tim Lin
0960bb3066 ITE: drivers/i2c: Add I2C target driver used buffer mode
Add I2C target driver used buffer mode. The maximum accessible buffer
is 2044 bytes, the default is 256 bytes.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-07-11 15:50:13 +02:00
Tim Lin
42e9dd8fe9 drivers/i2c/target/eeprom_target: Add buffer mode callback function
Add the callback functions of buf_write_received and buf_read_requested
to support buffer mode.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-07-11 15:50:13 +02:00
Tim Lin
27e2ec8a95 drivers/i2c: Add callback functions to support buffer mode in header file
Add buf_write_received and buf_read_requested callback functions
to support buffer mode.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-07-11 15:50:13 +02:00
Mike J. Chen
2a4acb2c42 drivers: spi: mcux_flexcomm: fix chip select bug w/ dma transfers
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59575

The dma version of the version of the driver can
invoke multiple intermediate dma transfers, like
when the spi_buf_set count is greater than one.
However, there is a bug where chip select is not kept
asserted for all intermediate dma transfers required
to process the entire spi_buf_set.

Signed-off-by: Mike J. Chen <mjchen@google.com>
2023-07-11 08:05:59 -05:00
Guillaume Gautier
cbf9f3d4c2 drivers: flash: stm32: add stm32wba support
Add Flash STM32WBA support

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
daef7c9d1b drivers: clock_control: stm32: Add stm32wba clock control driver
Add clock control driver on STM32WBA.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Chaitanya Tata
a132487fec net: wifi: Move Wi-Fi ops to a separate struct
Decouple interface and Wi-Fi APIs, Wi-Fi APIs are common independent of
Wi-Fi offload or implemented natively (This is preparation for
introducing Native Wi-Fi).

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Aymeric Aillet
1ddc41e7dd drivers: i2c: tca954x: Add build assert avoiding prio issues
In order for TCA954X driver to work well, we know that
mux root must be initialized before channels.
(see #37786).

This commit is:
- Ensuring that this condition is met at build.
- Document needed values for menuconfig to help user.
- Edit these values for TCA954X test sample

Fixes #40833

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2023-07-11 14:46:23 +02:00
Mykola Kvach
38675f2b92 soc: arm64: add support of r8a77961
Add support of r8a77961 SoC to gen3 series.
Create a dtsi file with a common part for both r8a77951 and r8a77961.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
d0472aae7a soc: arm64: add Renesas Rcar Gen3 SoC support
Add files for supporting arm64 Renesas r8a77951 SoC.
Add config option CPU_CORTEX_A57.

Enable build of clock_control_r8a7795_cpg_mssr.c for
a new ARM64 SoC R8A77951.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
644b38a3b7 drivers: rcar_cpg: do MMIO mapping inside driver
Add MMIO mapping for Renesas CPG driver in order to avoid
mappings inside mmu_regions.c file. Remove MMU region for
Renesas CPG driver.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
f66212022d drivers: rcar_cpg: delete irq lock/unlock from mstp_clock_endisable
Delete IRQ lock/unlock calls from 'rcar_cpg_mstp_clock_endisable',
because 'rcar_cpg_mstp_clock_endisable' function is always called
under spin lock.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
32e09e7c00 drivers: rcar_cpg: redesign cpg driver for r8a7795
Add associative tables for core and mod clocks.

Add possibility to enable/disable any of core clocks which presents
in the associative table.

Add handler for setting rate to driver and use generic rcar cpg
function for getting rate.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
6f24edf5c8 drivers: rcar_cpg: add generic Renesas functions for get/set rate
Add associated tables of clocks and API for working with these tables,
from this moment the relationship between clocks and their divider are
built. After set rate of some Core clock, driver has to update all
in/out rates of all childrens recursively. During get/set rate calls
if out rate is unknown, we try to get parent in/out rates and its
divider, in case when parent doesn't have valid in/out rates we get
parent of parent and so on until we get parent with a valid in or out
rates.

Add generic Renesas functions for get/set rate of CPG.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
e747e236ec drivers: rcar_cpg: move cpg log module declare to common rcar cpg file
Move cpg log module declare to common rcar cpg file. If the module
consists of multiple files, then LOG_MODULE_REGISTER should appear
in exactly one of them. Each other file should use LOG_MODULE_DECLARE
to declare its membership in the module.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
de639ed34c drivers: pfc_rcar: do MMIO mapping inside driver
Add MMIO mapping for PFC Renesas driver in order to avoid
mappings inside mmu_regions.c file.

Add a new system init function pfc_rcar_driver_init to PFC
Renesas driver for invoking a memory mapping macro.
Note: PFC Renesas driver doesn't use Zephyr Device Model.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
cb9d1607b3 drivers: uart_rcar: do MMIO mapping inside driver
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).

There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.

Note: it is common approach according to Zephyr documentation.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
L Lakshmanan
7fc6e331d8 drivers: mm: Add support for TI RAT module using system_mm API
Added Region based Address Translation (RAT) module driver. Required by
a few Texas Instruments SoCs to fucntion. Uses
sys_mm_drv_page_phys_get() API with device_map() for address translation.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-11 09:44:48 +02:00
Brett Witherspoon
33cb179b4f drivers: dma: stm32u5: set data length in bytes
The block data length field should be in bytes. Setting this to a value
that is not a multiple of the data size results in a user setting error.

Running the ADC DMA test prior to this commit:

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/adc/adc_dma

E: Transfer Error.
I: tc: 0, ht: 0, dte: 0, ule: 0, use: 1
E: DMA sampling complete, but DMA reported error -5

Existing tests using DMA on the nucleo_u575zi_q were not effected
because they only use a data size of one and continue to function
as expected:

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/spi/spi_loopback \
	-DOVERLAY_CONFIG="overlay-stm32-spi-dma.conf"

SUITE PASS - 100.00% [spi_loopback]: pass = 1, fail = 0, ...

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/dma/loop_transfer

SUITE PASS - 100.00% [dma_m2m_loop]: pass = 3, fail = 0, ...

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Brett Witherspoon
6d9d44e2a5 drivers: dma: stm32u5: use correct tables for data width
The tables for the dest and src data width constants were incorrectly
swapped. This commit uses the correct constants and renames the tables.

This change is only cosmetic for the stm32u5 since these constants are
the same but the existing names were probably inherited from another
driver where the p_*/m_* prefix was more appropriate.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Brett Witherspoon
f629f2c270 drivers: dma: stm32u5: enable error interrupts
Enable DMA error interrupts so that transfer errors are logged and
reported to the callback.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Bill Waters
541482ff20 driver: i2c: infineon: Adding XMC4 I2C driver
- This includes the driver, test app, and sample app
- Only the boards\arm\xmc47_relax_kit board is supported for now

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2023-07-11 09:43:19 +02:00
Thomas Stranger
cf29b8caad drivers: sensor: mx5837: address integer overflow.
Avoid integer overflow in temp_sq calculation.
For an analysis of the value ranges for the temp_sq calculation
of mx5837-02 see below:

calculation:
dT = adc_temperature - ((int32_t)(data->t_ref) << 8);
data->temperature = 2000 + (dT * data->tempsens) / (1ll << 23);
temp_sq = (data->temperature - 2000) * (data->temperature - 2000);

given needed storage sizes:
t_ref is uint16_t,
adc_temperature is uint24_t,
data->tempsens is uint16_t,

ranges
=> dT:                -16776960 <= dT <= 16777215         (25 bit)

=> data->temperature (TEMP):
  intermed.(mult): -1099478073600 <=  x   <= 1099494785025 (41 bit)
  TEMP:         2.000 - 131068 <= TEMP <= 2.000 + 131.069
  TEMP:                -129068 <= TEMP <= 133069     (17 bit)

So worst case we need 17 bit for TEMP, so the square of it would
overflow an int32_t. The nominal measurement range is
only -40 to 85°C, meaning a range of -4000 to 8500.
So normally the result for temp_seq would fit into a int32_t,
but we cast to be better safe than sorry. Also the 64-bit
multiplication won't be the dominating operation of the
whole calculation.

Fixes #58585
Coverity-CID: 316294
Fixes #58594
Coverity-CID: 316521

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2023-07-11 09:43:10 +02:00
Ambroise Vincent
b6af1ac66e drivers: eth_smsc91x: Implement promiscuous mode
Add the RCR_PRMS field to toggle the promiscuous mode in the Ethernet
controller.

Register a set_config function that can make use of the field when
CONFIG_NET_PROMISCUOUS_MODE is enabled.

Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2023-07-10 15:14:33 +02:00
Benedikt Schmidt
39391b4a16 drivers: spi: replace timeout for STM32 DMA slave mode
Replace the timeout for a SPI transceive in slave mode for STM32 DMA
operations with a K_FOREVER. Being an SPI slave means we do not
know when the transaction will start, hence it does not make sense
to have a timeout in such a case.
This will resolve issue #60000.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-07-10 15:13:19 +02:00
Wojciech Sipak
490281a1d0 drivers: adc: fix missing ref_internal in iadc_gecko
The adc_driver_api structure provides .ref_internal
which previously was unset.
Now .ref_internal is set to the proper value.

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-10 15:10:23 +02:00
Armando Visconti
76e5760545 drivers/sensor: lis2dh: move h/w reg debug print right after it is read
Move LOG_DBG print just after the printed h/w register is read, to avoid
coverity complaining about uninitialized variable.

  Fix:
     Coverity-CID: 316407 (issue #58591)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-07-10 10:00:48 +00:00
Alberto Escolar Piedras
1842c602ec drivers serial native ptty: Split in top and bottom
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-10 09:53:22 +02:00
Alberto Escolar Piedras
2d3c53f705 flash simulator: Refactor native part so it works with emb libC
Refactor the part of the flash simulator that interacts with the
host when build for native platforms, so it is possible to use
it also with the embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-10 09:50:56 +02:00
Gustavo Silva
4eedd45c85 drivers: pwm: pwm_mcux: fix for coverity 321142
Fix `PWM_SetupPwm` function being called with `numOfChnls`
argument equal to 2, when in fact only one channel is being set up.

Also add 'U' suffix to `pwmFreq_Hz` unsigned integer argument in
the function call.

Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
2023-07-10 09:30:05 +02:00
Jaroslaw Stelter
0bf467bbcd mm_drv: tlb: Fix context save for remapped pages
In case of remapped reference counter for physical page
is differ to zero, but TLB entry for virtual address equal to
physical address will be disabled. Valid entry will be somewhere
in virtual space where particular physical page is remapped.

Since in adsp_mm_save_context() routine we go through physical
memory range, we need to include these pages in context save loop.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-07-10 09:27:31 +02:00
Fabio Baltieri
fed377f622 drivers: mipi: delay initialization after display drivers
Currently MIPI devices are set to initialize before display drivers,
which is incoherent with how the mcux mipi-dsi device is declared in the
device tree.

This is detected with build time priority checking:

west build -p -b mimxrt595_evk_cm33 samples/drivers/display \
	     -DCONFIG_CHECK_INIT_PRIORITIES=y

ERROR: /soc/peripheral@50000000/mipi_dsi@31000 POST_KERNEL 40 <
		/soc/peripheral@50000000/lcdif@210000 POST_KERNEL 85

Note that this also changes the priority of dsi_stm32, though that
should be ok since does not appear to have other dependencies in
devicetree.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-08 12:39:53 -04:00
Najumon B.A
b4ed6c4300 drivers: serial: driver init level based on parent node
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-07-08 09:00:03 +03:00
Florian Grandel
75c83edc48 dts: ti: cc13xx_cc26xx: devicetree sysclk alignment
This change introduces the "_rtc_timer" suffix for the system tick timer
driver "compatible" property and aligns naming conventions with the
actual CC13/26xx SoC series product policy.

This frees up the "_rtc" namespace to introduce additional APIs based on
the same peripheral in the future (not part of this PR):

rtc: rtc@... {
  compatible = "ti,cc13xx-cc26xx-rtc";
  ...

  timer {
    compatible = "ti,cc13xx-cc26xx-rtc-timer";
    ...
  };

  counter {
    compatible = "ti,cc13xx-cc26xx-rtc-counter";
    ...
  };

  pps {
    compatible = "ti,cc13xx-cc26xx-rtc-pps";
    ...
  };
};

Or alternatively an MFD pattern with similar requirements.

Fixing the namespacing now makes sense standalone as it reduces the
chance of custom drivers being broken in the future.

Redundant extension of the mandatory system clock devicetree node is
replaced with a single `status = "okay"` which seems to be the more
sensible default to avoid user error when defining custom boards.
Knowledgeable users can still override this if really needed.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-07 18:46:24 -04:00
Florian Grandel
38e2eb8fe6 soc: ti: cc13/26xx: clean up include hierarchy
Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-07 18:46:24 -04:00
Alberto Escolar Piedras
8252e99608 drivers: entropy native: Refactor to support embedded libCs
Refactor the host libC accesses to use the native simulator
host trampolines.

In this way we support building this driver with embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-07 14:32:41 +02:00
Armin Brauns
b95cdb2a33 drivers: serial: stm32: add support for RS485 configuration
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.

This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.

This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:

$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
    grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
    cut -d/ -f6 |\
    sort -u

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-07-07 13:16:27 +02:00