Some devices may belong to >1 power domain, so with the current design
this is something not possible to describe. It's worth to note that
Linux also uses the `power-domains` naming scheme, not `power-domain`.
This patch also introduces `power-domain-names` so that each entry in
`power-domains` can be given a name if needed. `#power-domain-cells`
is now required as well.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Declare power state constraints for a device in devicetree.
It allows a map between device instances and power states that disable
their power. This information is used by a new API
(pm_policy_device_power_lock_put/get) that automically set/release
pm state constraints.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add the `zephyr,pm-device-runtime-auto` flag to `pm.yaml` and
`struct pm_device`.
This flag is intended to signify to the boot system that device runtime
PM should be automatically enabled on the device after the init function
has run.
Only run `pm_device_runtime_auto_enable` function on a device if
initialisation succeeded. This prevents actions being run on devices
that are not ready.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add support for power domains on Zephyr. Power domains are implemented
as simple devices so they can use the existent Zephyr API, for resume
and suspend sync and async and also reference count.
The pm subsystem will ensure that domains are resumed before and
suspended after devices using them. For device runtime power
management, every time the device is got or released the same actions
is done to the domain it belongs.
As domains are implemented as simple devices, it is totally acceptable
a domain belongs to another domain.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Introduce a new API to allow devices capable of wake up the system
register themselves was wake up sources. This permits applications to
select the most appropriate way to wake up the system when it is
suspended.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
