When using the interrupt UART API, it is expected that the driver will
call the callback function repeatedly while TX interrupt is enabled.
However that is not necessarily the case with the FIFO is enabled.
If the application calls uart_fifo_fill() each time with only one byte
of data, the TX interrupt will never trigger. This is because the 1/8 TX
interrupt trigger threshold is never reached. For this reason, the
callback function should be called multiple times from software as
needed.
Fixeszephyrproject-rtos/zephyr#85479
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Make use of pm_device_driver_init to perform driver initialization.
Implement PM suspend and resume, which performs the following actions:
* Enables/disables the USART
* Gates the USART clock
* Configures USART pins
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Reuse the same peripheral init function between init and the
runtime configure API. Remove redundant enable calls, the init
function enables the USART internally.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Currently, ns16550 allows the user to specify a clock attribute in the
Device Tree. This node is use to retrieve the internal frequency of the
hardware block.
However, ns16550 expects the clock is already initialised and it doesn't
try to enable it. Let's fix that issue.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This is necessary to suppress CMake build warning due to no source file
defined for drivers__serial.
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
The gecko_uart.c driver supports both `silabs,gecko_uart` and
`silabs,gecko_usart` compat strings, however `PM_DEVICE_DT_INST_DEFINE()`
was missing when defining `uart` type instances. The
efm32wg_stk3800/efm32wg990f256 platform enables by default one
`gecko_uart` DT node and no `gecko_usart` nodes. This results in the
following build warning/error:
uart_gecko.c:673:12: warning: 'uart_gecko_pm_action' defined but not used
Add the missing call to `PM_DEVICE_DT_INST_DEFINE()`.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
Fast instance in nrf54h (uart120) can generate a spurious RXTO event
some time after RXTO event that indicates that RX path is disabled.
The time when event is generated depends on baudrate and when slower
baudrates are used peripheral is disabled on time to not notice it
in the test but with higher baudates issue become visible. In order
to avoid spurious interrupt, RXTO interrupt is disabled during RXTO
event handling and enabled when RX is enabled. This workaround is
applied only for fast instance to avoid unnecessary register
accesses for slower instances.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
nrf54x devices have UARTE instance capable of using baudrate higher
than 1M. Higher baudrates does not have predefined values for
BAUDRATE register. A formula can be used to calculate BAUDRATE
value that shall be used for desired baudrate. Add UARTE_ANY_HIGH_SPEED
macro which is set when high speed is enabled (uart00 in nrf54lx or
uart120 in nrf54h20). For high speed instance use formula for getting
value that shall be written to BAUDRATE register.
When runtime configuration is not used then same formula is used to
calculate fixed BAUDRATE value.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Rename UARTE_ANY_FAST to UARTE_ANY_FAST_PD. There are 2 types of
'fast' UARTE instances. In nrf54h20 instance uart120 is in fast
power domain that requires additional power and clock management
of that domain. In nrf54lx fast uart00 instance does not require
that. Add _PD to indicate fast power domain.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Update the irq_enable macro to use the DT_INST_IRQN_BY_IDX helper.
This ensures proper handling of IRQ numbers in systems with multi-level
interrupt configurations.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Fixes a multitude of Kconfigs that wrongly appear on devices
where support is literally impossible
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adjust the PIO assemble for the UART RX to wait for the line
to initially be high before starting the wrap loop and wait
for a low start bit.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Split the USART driver into separate implementations for Silabs Series 2
and Series 0/1 boards. This change improves maintainability (especially
with the support of pin-ctrl and clock-ctrl on series 2 boards).
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Since some platforms may have some lpuart that are wrapped in lpflexcomm
and some that are not, then change the init code to determine how to
connect the interrupt on an instance basis.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When using asynchronous API, transfer will fail if the source buffer is
located in a region that cannot be accessed by DMA. This could happen
when a buffer is declared const, and placed in flash memory, for
example.
Workaround this problem by loading the data into a set of temporary
caches before passing them to DMA.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
This commit adds asynchronous mode support to MAX32 UART driver. Each
direction uses a single DMA channel that is assigned in devicetree
configuration.
Asynchronous mode also depends on interrupts to refresh receive
timeouts.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
In the application, after the sysjump, the RX interrupt might remain
enabled. During initialization, once the IRQ is enabled, the RX
interrupt could be triggered if there is any traffic on the RX line,
potentially causing an interrupt storm.
This change disables the UART RX interrupt at the driver initialization
to prevent this issue from occurring.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some time ago a new shim for nRF UARTE was added (uart_nrfx_uarte2.c)
which used nrfx_uarte.c driver underneath. It was supposed to support
nrf54x platforms. However, later on legacy driver (uart_nrfx_uarte.c)
was extended to support nrf54x platforms and it takes less code size,
has better performance and more features. Shim uart_nrfx_uarte2 will
no longer be supported. As new shim is the default and there is a
Kconfig to pick the legacy shim (CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y)
it cannot be deprecated in the normal way. Additional Kconfig option
is created (DEPRECATED_UART_NRFX_UARTE_LEGACY_SHIM) which is enabled
if CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n and it selects DEPRECATED.
A warning was also added to the CMakeLists.txt.
Patch removes use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM in tests.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
We add a serial UART driver for Microchip MEC5 HAL based chips.
The driver supports polling, interrupts, and runtime configuration
features. Power management will be implemented in a future PR.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
the following implementations are added:
- set cyclic variable to handle circular/normal mode :
enable dest/source_reload_en variable to set CIRC bit to 1 for RX or TX.
- DMA_STATUS_COMPLETE(0), DMA_STATUS_BLOCK(1) macros to handle half
and full irq
- add ASYNC_UART_STATUS_TIMEOUT(3) macro to work with default mode
- add status input in uart_stm32_dma_rx_flush function to handle
async events depending on the mode we are in.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
co-authored-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Updated various device definition macros to use the DT_INST variants for
consistency and improved readability.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Request fast global domain to run at 320 MHz during fast UARTE
activity. As request is asynchronous it cannot be called from
an ISR. Due to complexity to handle that without device runtime
power management a requirement is added so that if fast UARTE
is used device runtime PM must be enabled. Clock is request
and released in PM resume and suspended actions which in case
of fast UARTE are only called from thread context.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Currently, the uart_wch driver only supports the polling API.
This patch introduces bindings for the interrupt-driven API.
Signed-off-by: Paul Wedeck <paulwedeck@gmail.com>
Low power mode for non-asynchronous API case is only available when
RX is not used (RX pin is not defined). In that case TX starting
function was using uarte_enable_locked() which tracks if UARTE is
used by TX or RX and TXSTOPPED interrupt was disabling UARTE
unconditionally. Because of that following attempt to TX start
was assuming that UARTE is already enabled when it was disabled.
Fixing it by using uarte_disable_locked function in TXSTOPPED
handling.
Code reordering was required to make uarte_disable_locked()
available earlier.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
