Commit Graph

5 Commits

Author SHA1 Message Date
Dmitrii Golovanov
9c7288e86e arch: common: timing: Fix timing cycles 32bit rollover
Fix `arch_timing_cycles_get()` to prevent overflow on 32bit cycles
rollover. Also make `arch_timing_counter_get()` to work 64bit when
`CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER` is set.

The issue was observable, for example when `tests/benchmarks/wait_queues`
or `tests/benchmarks/sched_queues` were executed on qemu for `mps2/an385`
and the benchmark has its iterations large enough as the default
BENCHMARK_NUM_ITERATIONS=1000.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2025-01-17 20:07:16 +01:00
Gerard Marull-Paretas
16811660ee arch: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all arch code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:22 +02:00
Flavio Ceolin
49f0c74a9e arch: common: Fix 10.4 violations
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-04-10 09:59:37 -04:00
Daniel Leung
9be37553ee timing: do not repeatedly do init()/start()/stop()
We should not be initializing/starting/stoping timing functions
multiple times. So this changes how the timing functions are
structured to allow only one initialization, only start when
stopped, and only stop when started.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-11-11 23:55:49 -05:00
Anas Nashif
5dec235196 arch: default timings for all architectures
Use default if architecture does not have a custom timing
implementation.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00