Move all the vendor-specific dtsi files that were in dts/common to a
new folder under dts/ designated for vendor-specific files,
since they are not common at all, except for one vendor.
Change MAINTAINERS.yml to reflect the moving of the files.
Update migration guide for this change.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Switches back to equal sized partitions, this fixes an issue
whereby the number of overhead sectors for a swap mode was
incorrectly listed as 2 when it should have been 1, and also
allows using any swap mode. This means that when using swap
using mode, 1 sector in the secondary partition will be unusable,
and when using swap using offset, 1 sector in the primary
partition will be unusable
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Update exit-latency-us with newly measured values. Measurement is
taking into account additional timing compared to wakeup from
WFI.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add the Nordic Memory Privilege Controller (MPC)
in the dtsi of nrf54l15/10/05.
This sets the number of override regions and the
granularity of the regions.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Add support for the RPU, real-time processing unit on Versal NET SoC.
It is based on Cortext-R52 processor.
The patch contains initial wiring and configuration for generic board
with OCM(1MB) and DDR(2G) memories, cpu, interrupt controller, global
timer and UART.
versalnet.dtsi contains common peripherals integrated into Versal NET
SoC, and versalnet_r52.dtsi has peripherals which are private to
Cortex-R52 processor.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>
It is defined as spis120 rather than spi120,
because spi120 is already used for SPIM120 hardware instance,
but their base address is different.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Extend support in dt bindings and in the driver to allow use of
AIN8 to AIN13 analog inputs.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This is a follow-up to commit cdf45cb234077522b5cef2da084869af43d42dc1.
Adjust the DTS node for the nRF EXMIF peripheral so that it is possible
to handle the peripheral with the generic MSPI driver for DW SSI based
controllers and use all its data lines in communication.
Also adjust the related board files accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Set pm device runtime runtime auto flag to ensure saadc instances
are initialized correctly if pm device runtime is used.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
This reverts commit 70419bdee7.
This is because there are issues around slow IPC thoughput
with icbmsg, which is causing issues with BLE when lots of
data is required to be exchanged, e.g. with ISO.
Also there is an assert icmsg.c#L190 which occurs when
initializing bluetooth and IPC in certain circumstances.
Signed-off-by: Sean Madigan <sean.madigan@nordicsemi.no>
CAN is not ready yet for this platform (clock control drivers). So
remove the nodes for now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Updated list of partition tables generated using the following schemes:
- 'default' for most single core applications,
- 'amp' for the multi core applications using AMP.
The allocation rate for PROCPU and APPCPU usage is 3:1.
Added partitions for low-power (LP) cores to allow updates.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add clocks property to CPUs. nRF54Lx series is using hfpll as clock
source for CPU (and fast peripherals). CPU clock frequency can be
derived from frequency of the source clock so clock-frequency property
is removed from cpu as it is redundant.
nrfx/MDK expects that NRF_CONFIG_CPU_FREQ_MHZ define is set to correct
CPU frequency. Modified nrfx CMakeLists.txt to use clock frequency of
hfpll instead of CPU clock-frequency property.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add clock source to timers which indicates maximum frequency of
the timer instance.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Some nodes in nRF54H20 DT files did not have a `reg` entry matching the
node address. While not used in practice, this aligns with the DT spec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fast SPIM instances in nRF54H20 (SPIM120 and SPIM121) are driven by
the global HSFLL (HSFLL120). Add `clocks` property in these nodes
to reflect this.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
BICR (Board Information Configuration Registers) are located within the
application UICR region (ref. MRAM mapping, table 38).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The nrf-hsfll was previously the only supported HSFLL clock, hence it
was not namespaced fully. Since we added nrf-hsfll-global, we should
add the namespace to nrf-hsfll as well.
Updates drivers and devicetree uses of HSFLL as well.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add specific device model for global hsfll clock and update dts tree
to use specific model. The clock is not fixed, and configurable at
runtime to predefined frequencies specified by the platform.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Apply nRF54H20 `min-residency-us` and `exit-latency-us` values for
existing power states.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Add 128 MHz clock source and use it for uart00. Baudrate setting
must be adjusted based on uart clock source so without this
change there is wrong baudrate on uart00.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add `idle` and `s2ram` power states for nRF54H20 cpuapp and cpurad.
Also the substate `idle_cache_disable` added.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
These two new ICs are variants of the nRF54L15 with different memory
sizes:
- nRF54L05: 500KB RRAM, 96KB RAM
- nRF54L10: 1022KB RRAM, 192KB RAM
- nRF54L15: 1524KB RRAM, 256KB RAM
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
