Utilize a code spell-checking tool to scan for and correct spelling errors
in `Kconfig` files within the `drivers` directory.
Additionally, incorporates a fix recommended by the reviewer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Replaces binary literal with 3ULL to avoid shift overflow and align
with Zephyr coding style.
Fixes: #81963
Fixes: CID 434591
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
The usage of nrf_gpio_port_retain_disable/_enable, in cases where
the soc pins support retention, every pin must be
retained/unretained regardless of what power domain the pad is in.
This patch ensures retain is applied to all pins in all domains by
the gpio_nrfx device driver, not only pins specifically in the
fast_active_1 domain. Without this patch, pinctrl will correctly
retain pins, while gpio_nrfx will fail to unretain them when
again.
We no longer check the output state either, which was passed with
the flags arg of gpio_nrfx_gpd_retain_set() so this arg has been
removed.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The WCH GPIO peripheral integrates with the EXTI and supports firing
interrupts when a GPIO pin changes.
Add optional support for firing a callback on rising edge, falling
edge, or both edges.
Tested on the `linkw` and the `ch32v006evt` using
`samples/basic/button`.
Signed-off-by: Michael Hope <michaelh@juju.nz>
RA8P1 has 14 ports (from 0 to d) and 32 external irq while current
driver support 12 ports (0 to b) and 16 external irq.
This add addtional support for remain ports and external irq to be
able to work with RA8P1.
Fix the lack condition GPIO_RA_IOPORT for GPIO_RA_HAS_VBTICTLR
config
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
For the negative errno rzt2m_gpio_get_pin_irq may return to be properly
handled, irq variable needs to use signed type.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Coverity is reporting a possible untrusted loop bound, caused by accessing
num_pins through a tainted pointer. Use explicit type cast to keep coverity
happy.
CID: 347195
Signed-off-by: Loic Domaigne <tech@domaigne.com>
Fix an issue where calling gpio_pin_interrupt_configure
with edge mode and later calling it with level mode, did
not release the allocated gpiote channel.
Repeating the above sequence caused us to run out of
gpiote channels.
Signed-off-by: Markus Lassila <markus.lassila@nordicsemi.no>
- Add support for gpio interrupt on RX130.
- Add support for gpio-keys input subsys on RSK_RX130_512KB boards.
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Add support for nPM1304 in the npm13xx drivers. The nPM1304 supports
different voltage and current ranges which are handled through the
initialization macros.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Rename npm1300 to npm13xx in function names, documentation, etc. where
applicable for all the npm13xx drivers
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Rename npm1300 drivers and header files to npm13xx to allow for usage
with other nPM13xx product variants.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Use signed variable for negative error codes so that potential errors
are actually detected and returned properly.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
If supported, the data and control source for a signal can come from
either software or hardware. This change adds a custom configuration
flag to set this for a specific pin.
Signed-off-by: Corey Wharton <xodus7@cwharton.com>
- Adding support for GPIO_DISCONNECTED mode.
- Removing redundant interrupt configuration logic from the
.pin_configure API (already handled in pin_interrupt_configure).
Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Remove gpio clock management from the GPIO driver when running on the
cortex-m33 on the mp2 and gpio clocks are managed by the cortex-A, being
the resource manager, allowed by the Resource Isolation Framework (RIF).
Also add a specific binding for the mp2 gpio to make clock property
optional.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Implement conditional compilation to avoid the warning:
- Use LL_PWR_EnableVDDIO2() for STM32U3 series.
- Use LL_PWR_EnableVddIO2() for other series.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
gpio_rpi_isr() always addressed io_bank0->proc0_irq_ctrl, so any
interrupts taken while code was running on core 1 were invisible and
left pending.
Use get_core_num() to pick proc1_irq_ctrl when the ISR executes on core
1, ensuring callbacks fire from both cores.
Also fix stray `iobank0_hw` symbol for the correct `io_bank0_hw`.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Ensure gpio_set_dir() receives GPIO_IN or GPIO_OUT by mapping
INIT_{LOW,HIGH} flags explicitly, instead of passing raw bitmasks.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Fixed several occurrences of offset not being calculated in case
multiple GPIO ports are present.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
If gpio-reserved-ranges to reserve some pins which used by other CPU
Core's OS, we could only handle usable pins owned by current CPU
Core in interrupt handler.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
If the platform uses SCMI pinctrl driver, pinctrl regitster can't accessed
by CPU Core directly, and currently SCMI pinctrl driver has no API to read
back the register value, so use default pad config value for GPIO pad
configuration, and in theory we could use a fixed pad config value in this
driver as each new GPIO configuration has no relation with previous
configuration.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
The gpio_smartbond driver incorrectly uses the static
PM_DEVICE_DEFINE() and PM_DEVICE_GET() macros when creating a driver
instance from a devicetree instance number.
Update to use PM_DEVICE_DT_INST_DEFINE() and
PM_DEVICE_DT_INST_GET() macros.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
If GPIO_INT_WAKEUP is in the trig argument, the selection
of trigger mode breaks because the GPIO_INT_WAKEUP flag
breaks the equal comparisons.
Signed-off-by: Mike J. Chen <mjchen@google.com>
This change would also solve that according to the C11 standard,
section 6.5, paragraph 4, the usage of bitwise operators on
signed integers is implementation defined.
Signed-off-by: Stephan Gatzka <stephan.gatzka@gmail.com>
Currently, the Zephyr dt requires address to the direction register
instead of the base GPIO address. usually means base address + 0x10 when
compared with Linux.
To make things more consistent between linux and zephyr, handle the
direction offset in the driver itself. This also lays the foundation for
supporting more than 32 GPIOs per port in the future by introducing
offsets for all the banks.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Currently to set/clear the pins, we do a logical OR of the value with the
existing values in set/clear registers. However, reading these registers
always returns the value in out_data register. This is undesirable as it
can cause unnecessary complications. Consider the following scenario:
We need to set PIN 0:
set_data |= BIT(0)
We need to clear PIN 1:
clr_data |= BIT(1)
The latter would also clear the 0th bit due to the aforementioned
behaviour.
This patch fixes this by writing the mask directly without ORing.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Update hal_wch.
As the hal upstream changed name, there is now a name conflict.
Rename ch32fun.h to hal_ch32fun.h to fix this conflict.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
