Wei-Tai Lee
c351a0e044
drivers: cache: andes: Fix incorrect DT_PROP usage
...
Remove redundant quotation marks when parsing
cache line size from DTS properties.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-12-18 03:04:57 +01:00
Wei-Tai Lee
b3d3c0f702
driver: cache: andes: Support enable/disable on CPUs lacking CCTL CSRs
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For CPUs without CCTL CSRs, return ENOTSUP in cache operations.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-12-18 03:04:57 +01:00
Wei-Tai Lee
5cf6137b38
drivers: cache: andes: Dynamically calculate L2 cache parameters
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Enhance the driver to calculate the L2 cache line size and number
of ways at runtime. The L2 cache line size is assumed to match
the L1 cache line size, while the number of ways is determined
based on the total L2 cache size.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-12-18 03:04:57 +01:00
Jordan Yates
91f8c1aea9
everywhere: replace #if IS_ENABLED() as per docs
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Replace `#if IS_ENABLED()` with `#if defined()` as recommended by the
documentation of `IS_ENABLED`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-06-28 07:20:32 -04:00
Wei-Tai Lee
80f9736115
drivers: cache: add Andes cache driver
...
Add cache driver for Andes cache.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-04-22 09:19:27 -04:00
