Start testing adc_api on channel 1
for stm32w55 nucleo and stm32l562 disco boards
since the VREFINT on channel 0
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.
This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().
During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.
Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.
Fixes: #45304
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
During rebase two test main source files, that were removed during the
transition to the new ztest api, were accidetally added again.
First Removed in #49509 and #49554.
This commit removes them again.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In test_all_instances(), if ARRAY_SIZE(devices) is 0, the test is not
performed. At this time, the test result should be TC_FAIL, instead of
TC_PASS. A zassert is needed to filter this case.
Fixes: #45647
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
The current stm32l562_dk_ns has no flash partitions defined. This add
flash partitions following partition sizes that are compatible with
the TF-M platform defined at flash_layout.h and removes the redundant
overlays board files.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Declare pw0 channel0 that can be used on H3ULCB (test pin CP8).
Add support status to H3ULCB board documentation.
PWM0 is disabled by default as its usage could consume uneeded
power.
Only enable it into the test API with overlay.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
Increasing the stack size to pass the
tests/drivers/flash testcase on the disco_l475_iot1 disco kit.
Note that CONFIG_MPU_ALLOW_FLASH_WRITE is set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
this commit adds an overlay to run the tests/drivers/flash
on the b_u585i_iot02a_ns target platform.
It renames the non-secure partition to slot1_ns_partition
to match the testcases.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the dma transfer for the SPI loopback test
for the b_u585i_iot02a disco kit and nuceo_u575zi_q.
GPDMA1 is the DMA instance
Connect pins on the target board D11 <--> D12 of the CN13
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes#47921
When setting a GPIO to certain value, and then get the GPIO value, on some
platforms, such as ITE, these two values may not be the same. For example
setting GPIO_OUTPUT | GPIO_OUTPUT_INT_HIGH, it will read back
GPIO_OUTPUT | GPIO_OUTPUT_INT_HIGH | GPIO_VOLTAGE_3P3. This is as expected,
as GPIO_VOLTAGE is a read only property. So when comparing the gpio set
and get values, it is necessary to filter the read only bits first and
then compare to the set value.
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Add support for rpi_pico board to adc_api test.
At this time, twister couldn't with rpi_pico board,
Test it built with west and checked the console output.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
The commit switches flash area access from FLASH_AREA_ macros
to FIXED_PARTITION_ macros and to usage of DTS node labels,
to identify partitions, instead of label property.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The CAN shell test is flaky on some qemu platform (qemu_riscv64_smp in
particular), where the first test command occasionally fails as it tries
to run with the backend not initialized.
The tests for subsys/shell/shell/src/main.c have a setup delay, copying
it to the CAN shell test seems to make it work reliably.
Tested with:
./scripts/twister -v -n -M -p qemu_riscv64_smp -T tests/drivers/can/shell
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices
are move to new ztest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core
are moved to new ztest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices
are moved to new ztest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core
are moved to new zest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices
are moved to new ztest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
test cases in
tests/dirvers/clock_control/stm32_clock_configuration/stm32_common_core
are moved to new ztest API
Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
