Swith integration_platforms from native_posix(_64)
to native_sim(_64).
And replace it also in a comment.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Change the stdev tolerance stdev from 10 to 33 when npcx timer is used.
This is because the clock source of npcx event timer, which is used to
generate the timeout interrupt, is running at 32.768 KHz.
(i.e. 1 count = ~30.5 us.) The conversion from the absolute system timer
to the event timer count might have -30.5 ~ 30.5 deviation.
The tolerance setting is under the assumption that test sampes are
evenly located at 1030.5 and 969.5 for the worst case.
Fixes#59594
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
rand32.h does not make much sense, since the random subsystem
provides more APIs than just getting a random 32 bits value.
Rename it to random.h and get consistently with other
subsystems.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When the timer frequency is known at compile time, make sure we can use any
time conversion macro as a global initializer.
Signed-off-by: Keith Packard <keithp@keithp.com>
Add qemu_leon3 target to the tests that list below. These set
CONFIG_MULTITHREADING=n.
- tests/kernel/mem_heap/mheap_api_concept
- tests/kernel/mem_slab/mslab_api
- tests/kernel/threads/no-multithreading
- tests/kernel/timer/timer_api
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This is a follow-up to commit 4cc21e2f4a.
That short sleeping before starting the test was removed together with
accuracy improvements (specifically, with moving of the first readout
of the cycle counter). Nevertheless, this tick alignment it still
needed, as without it in specific conditions the test may undesirably
fail.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
All of the time_units conversion routines are now macros which means the
test cannot reference them as functions. Instead, create local static
functions which call each one of them and use those instead.
Signed-off-by: Keith Packard <keithp@keithp.com>
This patch shows an example of how to use the timer behavior external
tool testing, using the Saleae Logic 2 application.
Also, some board overlays were added as examples.
Finally, testcase.yaml updated with parameters for the Saleae sample.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This patch adds a way to simplify using an external tool to measure
timer behaviour on Zephyr. It modifies the timer behaviour
jitter_drift.c tests to toggle a GPIO pin (defined via a new DTS
compatible, "test-kernel-timer-behavior-external") that can be connected
to an external tool, such as a logic analyzer, to measure timer
behaviour.
This GPIO pin toggle is behind a new CONFIG_TIMER_EXTERNAL_TEST Kconfig.
A new pytest test is added so that it can collect the statistics from
the external tool and assert some measurements. To collect statistics
from the external tool, one needs to provide a Python module which
provides a `run(seconds, config)` method, that will perform the test and
return the statistics. Check the README file for more information about
this interface.
Finally, this on twister, this new test is behind a new fixture,
"gpio-timerout".
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This follows the same convention that has already been adopted by Intel
Alder Lake and Raptor Lake boards.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Introduce new API to compare two timepoint values to
find the one that is going to expire sooner, or is already
expired.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Commit a1d21ca69b ("tests: timer_behavior: don't fail the test with
timer wrap-arounds") simply ignored the total time validation whenever
any rollover was detected. Let's adjust the end timestamp according
to the number of rollovers instead.
Documentation for sys_clock_cycle_get_32() says it should count up
monotonically through the full 32 bit space, wrapping at 0xffffffff.
Therefore we just need to add 2^32 times the number of rollovers to
the end timestamp.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The default tick rate for the nRF RTC timer is 32768 Hz, so one tick
is ~30 us. This turns out to be too little for the following loop
executed in user mode on the Network core in nRF5340:
```
do {
t0 = k_uptime_ticks();
rem_ticks = k_timer_remaining_ticks(&remain_timer);
t1 = k_uptime_ticks();
} while (t0 != t1);
```
The time between the two calls to `k_uptime_tick()` is there always
above 30 us, so the loop never ends.
This patch decreases the tick rate for all nRF platforms because on
other nRf SoCs the time mentioned above is also close to 30 us and
apparently changes in code completely unrelated to this test affect
execution time of system calls in the above loop - the test started
to fail after commit 0014dd05f0 that
changes fdtable was merged and if `fdtable.c` is for example just
temporarily excluded from the build, the test passes.
The root cause of the problem seems to be related to user space
handling and this should to be investigated further. This patch
is applied only to allow this test to pass for the time being.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use 13% instead of the default 10% when the nRF RTC timer is used
so that the allowed drift is at least one tick long (~122 us in
this case).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Kernel is being built the same way for all those tests and there is not
much related to the linker generator in any of those tests. Just keep a
small set of tests to have needed coverage in the kernel.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This test was excluding and including only
the native_posix board, while it should have instead
excluded/allowed anything in the architecture.
=> Change the filtering accordingly.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If the timer driver only implements sys_clock_cycle_get_32() (meaning
CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER=n) and the hardware clock is high
enough then the reported cycle count may wrap an uint32_t during the
test. This makes validating the total test duration pointless as it
cannot be measured. Just print a warning instead of failing the test
in that case.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
TC_START is used to evaluate output of tests and is used internally by
ztest when a test starts, no need to call this manually here.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Nordic targets use 24-bit RTC peripheral for system clock. Nordic system
clock timeout implementation relies on RTC CC (capture compare) when
the timeout is in future. Nordic system clock driver allows setting
alarm only to 3 or more counts from current counter value due to silicon
limitation (to ensure that CC event triggers before counter overflow).
RTC CC limitation does not have much impact on normal applications where
there is no need to schedule such short timeouts, but is problematic in
a timer test that expects being able to repeatedly schedule timeouts on
subsequent ticks.
Reduce system tick rate to 8192 on nRF targets to allow setting CC to
the very next tick. With system tick rate being 4 times less than the
hardware tick rate, it is always possible to schedule timeout to happen
in the next tick because ticks are 4 counts apart, i.e. current timer
value + 3 never runs past the next tick.
Fixes: #54211
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This commit marks testcases that require working Power Managament with
the appropriate `pm` tag to allow proper testcase filtering in the board
YAML file.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Don't sample the first entry outside the timer as this is a different
code path which produces a different offset from the clock tick.
Use sys_clock_hw_cycles_per_sec() to be compatible with systems that
read their hardware clock frequency at run time.
Perform cycle difference computations with uint64_t. If ever the
magnitude of the absolute clock cycle values is greater than 52 bits
then the cast to a double will actually lose accuracy.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
An assertion statement was a bit too strict. Period drift may come about
not only from kernel ticks being large but also from time conversion being
inexact due to division truncation.
Fixes: #55136
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Provide an estimate of the test duration.
Make the output nicer than a few overloaded and wrapped lines.
Provide more context in the presence of period time drift.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Print the "perfect" reference period for easier evaluation.
Suggest a remedy to the missed ticks problem.
Still, that wasn't satisfactory. Implemented a count of missed ticks
to get to the bottom of this issue. Found that missed ticks always came
to a perfect count of 40.
Incidentally, the busy loop prints a line every 250 ms and the test spans
10 seconds. There are no such coincidences.
Turns out that CONFIG_PRINTK_SYNC was set by default. This disables IRQs
for the serial output duration, which can be quite long at 115200 bauds.
Given a 60-ish character line length, this represents more than 5 ms of
no IRQ servicing during a timer latency measurement test which is bad.
So make sure CONFIG_PRINTK_SYNC=n for proper statistics.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Fix all line-length errors detected by yamllint:
yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \
grep '(line-length)'
Using a limit is set to 100 columns, not touching the commandlines in
GitHub workflows (at least for now).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The test in its default configuration needs 3600 seconds to complete,
adjust timeout for twister to meet that.
Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
integration_platforms help us control what get built/executed in CI and
for each PR submitted. They do not filter out platforms, instead they
just minimize the amount of builds/testing for a particular
tests/sample.
Tests still run on all supported platforms when not in integration mode.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The requirement of being able to spend only 10% of processing time
on execution of timer handlers that are scheduled on every tick is
not really possible to fulfill on platforms like the nRF ones where
the tick period is quite short (~30 us in this case). Relax this
requirement and accept if at least one-third of the processing time
is available for other work while handling the timer tick train.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The test in its default configuration needs 3600 seconds to complete,
so use such timeout value in testcase.yaml so that twister called with
--enable-slow option can successfully execute it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
For tests that set CONFIG_MP_NUM_CPUS, switch to using
CONFIG_MP_MAX_NUM_CPUS instead as we work to phase out
CONFIG_MP_NUM_CPUS.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Test timers with a train of one tick timers to test that
a configured SYS_CLOCK_TICKS_PER_SEC is sensible. If the TICKS_PER_SEC
is too high the timer train will take longer than expected to reach
the station. Worse, if the timer driver has too short of a minimum
delay for its processing power and the tick rate is too high its
possible the device will get caught in an interrupt loop
preventing any threads from running while processing timers.
This test validates that the tick rate configured is actually able to be
processed without delays while also having work done in threads ensuring
that no thread scheduling delays occur either from delayed timers or an
interrupt loop from preventing threads from running.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds a custom test_main and renames the test suite for jitter_drift.
Runs the jitter_drift test suite.
The order of these tests matter on hardware as the counter is often
reset on loading the test program. This is useful as its far less likely
to encounter a clock counter rollover. On arm this is especially useful.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move the main.c timer behavior test code to jitter_drift.c
so that other tests may be added to the suite.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In the default configuration of the test, with 10000 timer samples,
the `periodic_data` array is too big to fit in SRAM on many targets.
Use lower counts of samples for those, depending on their SRAM size,
leaving at least 8 kB for other variables, buffers, stacks etc.
Exclude the test for targets with less than 16 kB.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
