Added driver and binding file for samd5x dac peripheral, the already
implemented dac_sam0.c lacks the configuration registers for this
microcontroller family and is fixed to only have one dac channel output,
also, the code gets too bulky when adding the samd5x dac configuration
using preprocessor directives that’s why I moved the implementation to its
own file.
Added dac to the supported list of same54_xpro.yaml, fixed Kconfig.samd5x
help spacing, added board defines to test_dac.c and test it out with
twister script on board.
Signed-off-by: Rafael Aldo Hernández Luna <aldo.hernandez@daikincomfort.com>
Adds a I2C+GPIO Target device binding for MCTP communication over I2C.
The binding requires an i2c bus and gpio pin, along with a specified I2C
and endpoint address pair. These are then used to create an MCTP binding
which can be used to communicate in a peer to peer manner among other
MCTP endpoints.
Each message transmit signals to the bus controller using a GPIO logical
high and is unset on transmission completion. Pending transmitters are
queued using a semaphore avoiding memcpy being needed to asynchronously
transmit mctp pktbufs.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds a custom MCTP binding for an I2C bus controller using GPIO signaling
for write requests rather than mode switching.
This binding operates a lot like the I3C binding specification DMTF has
for MCTP. The controller expects to receive interrupts (from GPIO pins)
and upon getting an interrupt read a message from the I2C target device.
The macro does a lot of the heavy lifting to setup all the state needed
for capturing GPIOs, being able to do asynchronous reads/writes, and
such. The entire controller works using state machines driven by
interrupts leading to low latency and clear ram costs.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch adds the initial support for the OMAP Multi-Channel SPI. Some
things should be noted however:
- DMA xfers are not supported yet. Only PIO is supported as of now.
- Multi-Channel controller is not supported yet. Only single-channel
controller mode is supported, this means that the controller can xfer
messages with one slave at a time.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Fixed a bug where unconfigured clocks were connected to the can
interface in the device tree for SAM0, causing the interface to work
incorrectly. Fixed by adding the correct index when calling GENCTRL.
Also, the default divider has been reduced to 6 to allow setting
the bitrate to 500 kbps.
Tested on a canopennode sample on a board with an ATSAMC21E18A
microcontroller.
Signed-off-by: Vitaliy Livnov <vitaliy.livnov@devkit.agency>
- Change erase-block-size from 8192 to 4096 bytes to match
the 4 KB page size of STM32U3 flash.
- Update max-erase-time from 5 ms to 14 ms according to
datasheet specifications.
- These changes ensure correct flash erase behavior
and timing on STM32U3 devices.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
The Quectel BG95 binding currently marks mdm-power-gpios as
required. This fits designs that expose the PWRKEY pin, but the
BG95-M3 in Mini PCIe form-factor boots automatically via its
on-module “Automatic Power-On Circuit” and does not route
PWRKEY to the card edge.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
SENT, PSI5, Virtio where all recently added types. Add them to the
binding-types.txt file so that their full name can be displayed in the
documentation.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
LPTIM2 is enabled by default; disable it to avoid
the build failure:
"Error: Only one LPTIM instance should be enabled"
when LPTIM1 is also enabled in the DTS.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Description of parameters in st,control property didn't match the values
used in the code.
Modify the description to match with the current driver implementation.
Also add a description for reg property to help setting it properly and
add corresponding dt-bindings.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Move the IronSide APIs to soc/nordic from drivers/firmware since
these are vendor specific APIs. The header files are now included
from <nrf_ironside/*.h>. Adjust code that uses these APIs accordingly.
Also move the DT binding for "nordic,ironside-call" from
bindings/firmware to bindings/misc.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
nordic,entropy-prng does not exist in Zephyr (it is part of NCS)
but we have in both the nordic,nrf-cracen-ctrdrbg which is
an actual source of true entropy and works with this SOC.
Let's use that instead.
Fixes failures to build targeting the nrf54lm20dk any test/sample
which uses the entropy driver.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The DT hierachy of the RT11xx series was somewhat incoherent. The boards
targets were directly including the series level DTSI with no SOC dtsi
in between, and there existed an SOC DTSI that had to be separately
included by a different board file, which didn't include the series DTSI
itself. It seems that this was only working if you included the files
exactly in the correct order in specific board files. Also, as a result
of this change, need to (correctly) define the cpu core only in the DTSI
for that core, instead of in the series generic dtsi, because that DTSI
was actually written with incorrect syntax due to duplicated node labels
on nodes right next to each other in the same file, and was relying on
other DTSI files to delete the duplicate nodes in order for it to build.
So overall this was a mess, needed cleanup.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
All this can be rolled into the single latency number.
Exit latency also triggers an additional timeout which
is not required for this SoC.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit adds a device-tree prop for the audio streaming
terminals to specify the bInterval values for the Isochronous
endpoints.
Signed-off-by: Victor Brzeski <vbrzeski@gmail.com>
AXISRAM3/4/5/6 nodes are added as children of their respective controller.
They're declared as "zephyr,memory-region" and disabled by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
1. add the ostimer
2. by default, the systick is used.
3. The ostimer could be tested with below configure in xxx.overlay:
&systick {
status = "disabled";
};
&ostimer0 {
status = "okay";
};
And below configure in xxx.conf:
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
Fixed typo whereby the description field started with `description: |`
instead of actual description.
Also added a proper title field while at it
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add driver for Microchip PolarFire SoC (MPFS) peripheral clock and soft
reset control.
Normally, the peripheral clocks and reset state are controlled by the
Hart Software Services (HSS) running on the Monitor processor. As an
alternative to using HSS services, applications can now enable the reset
controller in a device tree overly, for example:
&reset {
status = "okay";
};
&uart4 {
resets = <&reset MSS_RESET_ID_MMUART4>;
};
Embedded the reset controller node in system controller node.
Signed-off-by: Frank Kühndel <frank.kuehndel@embedded-brains.de>
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Introduce a new USB Video Class (UVC) implementation from scratch.
It exposes a native Zephyr Video driver interface, allowing to call the
video_enqueue()/video_dequeue() interface. It will query the attached
video device to learn about the video capabilities, and use this to
configure the USB descriptors. At runtime, this UVC implementation will
send this device all the control requests, which it will send to the
attached video device. The application can poll the format currently
selected by the host, but will not be alerted when the host configures
a new format, as there is no video.h API for it yet.
Signed-off-by: Josuah Demangeon <me@josuah.net>
TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Compare block which is used to generate time expiry and output
waveform like PWM. Add driver support for MSPM0 PWM output.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
