Commit Graph

4 Commits

Author SHA1 Message Date
Andy Ross
686b9fff5e samples/synchronization: Clean up SMP CPU pinning example
There was some code to demonstrate the cpu_mask API here, but it was
asymmetric (only thread B was pinned) and assumed exactly two CPUs.

Start both threads pinned to CPUs 0 and 1 from an external main, and
predicate the pinning on there actually being more than one SMP CPU.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-18 12:04:49 -05:00
Anas Nashif
ad8caa65e8 samples: synchronisation: run thread_b on cpu 0 in SMP mode
Always run thread_b on CPU 0 by setting cpu_mask if on SMP system.

Run this with CONFIG_SCHED_CPU_MASK=y set on an SMP system.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-19 10:57:15 -04:00
Anas Nashif
2f30c5dcb8 samples: synchronisation: set thread names
- Use new k_thread_name_set to set thread names.
- Use board name in sample instead of architecture.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-27 08:58:55 +05:30
Anas Nashif
886677c3de samples: synchronization: move to legacy/
Change-Id: I72d6fcba0c747e27c0e9cb9fade7abcf8bd077bc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-02 22:05:29 +00:00