Replace CONFIG_ESPI_SLAVE by CONFIG_ESPI_TARGET
Replace CONFIG_ESPI_SAF by CONFIG_ESPI_TAF
Replace ESPI_BUS_SAF_NOTIFICATION with ESPI_TAF_BUS_NOTIFICATION in API
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Removes support for the deprecated features of having a prj file
which has the board name on the end of it. Board Kconfig fragments
should be used instead.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
PR https://github.com/zephyrproject-rtos/zephyr/pull/55129 deleted the
"port-sel" property. Delete this property from remaining Microchip SoC
variants and boards.
Test: west build -b mec172xevb_assy6906 samples/drivers/espi/
Signed-off-by: Keith Short <keithshort@google.com>
Microchip XEC devices specify GPIO pin using octal numbering and
organize pins in banks of 32. Chip documentation does not use
bank naming rather naming each pin by its octal number. This has
led to the developer having to calculate the bit position of a pin
in its 32-bit bank when a specifying the pin for GPIO usage. We
created a set of defines for all possible GPIO pins that specify
the DT GPIO bank name used in the chip level DTSI files and the
bit position in that bank.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update sample espi driver test to exercise some SAF functionality
based on the limited hardware available. Note the SAF test will
erase a section of the flash. SAF tests are enabled for the EVB only.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
