Legacy shim takes less flash so it should be a first choice on cores
with less code memory (like RISCV cores on nrf54h20). Adding new
instances support to the legacy shim.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Two Kconfig symbols were tied to a board-specific DT nodelabel - namely
the `NRFX_UARTE_CONFIG_RX_CACHE_ENABLED` and `UART_<n>_RX_CACHE_SIZE`
were tied to `shared_ram3x_region` - but this is not necessary.
That DT node is where the UARTE driver RX/TX cache buffers are placed
in the default nRF54H20 DK memory map, but on another board, they could
be located somewhere else.
The exact memory sub-regions used for this purpose are indicated using
the `memory-regions` property on each UARTE instance, which should be
generic enough already, so let's use that instead.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
DT nodes and compatible had been renamed and Kconfig option was relying
on the names that do not exists.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
On nRF54H20, only the new shim can be used and the enhanced poll out
cannot be enabled since there is no DPPI support for this SoC yet.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add new shim which is based on nrfx driver.
Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Rework Kconfig to improve handling of multiple UART instances by
using Kconfig template file.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
