The local function ll_gpio_get_pin_pull() is not always referenced. Add
the __maybe_unused attribute to avoid compiler warnings (which may be
promoted to errors by downstream users).
Signed-off-by: Keith Short <keithshort@google.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
There are numbers of drivers for different PCA(L) series chip. They
share similiar register layout and control logic. This driver intends
to unify these drivers for PCA(L)xxxx series i2c gpio expanders.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Implement an option manual reset of the PCAL64XXA to allow the external
implementation of a retention of the port expander state.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Extract method which applies the initial state in the driver
for the port expander PCAL64XXA.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove all entries that as not being used.
This also update hal to re-enable warning flags
as such as -Wno-unused-variable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit rebrands the STM32 EXTI API to a more hardware-agnostic
"GPIO interrupt controller" API, in anticipation of the introduction of
new series lacking the EXTI peripheral. The GPIO and EXTI drivers are
updated to match the rebranded API.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit makes the contents of the stm32_exti_line_t data type opaque to
the EXTI GPIO interrupt controller API users. The GPIO driver is updated
to comply with this API change.
N.B.: while some assertions are removed as part of this commit, they were
broken since forever anyways, so nothing of value is lost.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Move the functions that interact with EXTI configuration registers to
select or get the GPIO port that triggers events on a given EXTI line
to the EXTI driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Modify all functions in the GPIO driver that interact with the EXTI
so that names, signatures and comments match what they do better.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Use the `gpio_pin_t` type for all variables that hold a pin number (0..15).
Change all `int` to `uint32_t` instead, as signedness is unwanted.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit changes the EXTI driver API to use unsigned types
for all parameters previously typed as `int`, as the signedness
is unneeded and unwanted.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
- Removed zero initialization of `pincfg` structure as all members
are guaranteed to be set.
- Introduced `pfs_cfg` as an intermediate variable to store data in
the CPU register instead of stack.
- Simplified pin setting logic by relying on `pfs_cfg` being
zero-initialized, eliminating the need for explicit bit clearing.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This is just the driver for banks 0 to 3. Bank 4 will come via a
separate commit since it needs a different driver.
Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
Add checks to return value of esp_intr_alloc to avoid drivers init
returning 0 when interrupt allocation fails.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Introduced `GPIO_DEVICE_INIT_RA_IF_OKAY` which utilizes `COND_CODE_1`
to reduce the chain of #if DT_NODE_HAS_STATUS(...) #endif
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Writing directly to Px_DATA_REG modifies pins which are not
indicated by mask, causing gpio_basic_api test to fail.
Use Px_SET_DATA_REG and Px_RESET_DATA_REG to modify only
pins indicated by mask.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Set pin to input with no resistors selected when it is configured as
GPIO_DISCONNECTED.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Background of this modification is to make gpio driver code
provided by Renesas vendor to be an official support for Renesas
MCU on Zephyr
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
RGPIO model on RT1180 is same with igpio, however,
current driver can't support.
Update gpio driver to support gpio pad control
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Put disconnected GPIOs to high impedance state by setting their
direction to input and pad control to none.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Using DEVICE_DEFINE, a device without a corresponding DT node can be
defined (for example CRYPTO_MTLS), Z_DEVICE_INIT() does not initialize
dt_meta for such devices, leaving the field as NULL.
device_get_dt_nodelabels() and functions calling it have to handle
dev->dt_meta == NULL to prevent fatal errors.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Pin definitions should correctly reflect the actual drive mode of the GPIO
controller, either push-pull or open drain.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This allows getting rid of the ngpios property, which is implicit in the
part number. It also prepares for configuring pins as open-drain on
supporting chips in the next commit.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This chip is handled by the more generic mcp23xxx driver, which will get a
microchip,mcp23s17 compatible binding in the next commit.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Convert pin control, GPIO and external interrupt controller drivers
based on SIUL2 peripheral to native drivers. This must be done in a
single commit to preserve atomicity, as these drivers depend on each
other.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fixes: #75390
A wrong bit mask (wrong: IOMUXC_SW_PAD_CTL_PAD_PUS_MASK = 0x8) was used.
That bit mask is for PUE/PUS-type gpio registers, but this is the
section for registers with alternative PULL (PDRV) type layout.
Right bit mask: IOMUXC_SW_PAD_CTL_PAD_PULL_MASK
Signed-off-by: Nils Larsen <nils.larsen@posteo.de>
This is the initial commit to support for gpio driver
for RA8M1 MCU, the coding is base on renesas fsp hal
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Fix a build warning due to the enumerate for the trigger
polarity possibly being (from the point of the compiler)
also GPIO_INT_TRIG_WAKE.
We fix it by simply returning a not valid argument error
which is what most other drivers do if they do something
smart enough.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
When getting gpio info for a specific device with no line
names, invalid memory was accessed.
The check for the length of the line name array has been
corrected to avoid this.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Changes to bring support for esp32c6 SoC.
- clock control
- gpio
- pinctrl
- serial
- timer
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
LPC GPIO binding was wrong in that the reg address
on the simple soc bus was given as an index of the gpio ports
within a gpio controller. Fix this by putting the GPIO node
on the simple bus as a single node with the correct base address,
and make the ports children of this node.
Change the driver to get the port number from the reg address
instead of a custom property, and get base address from DT instead
of the SDK macro definition.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use some new kernel features to make the experience of finding and
dealing with GPIO devices much more ergonomic by allowing the use of
devicetree node labels to identify GPIO devices by default.
Users who wish to avoid the associated footprint penalty can set
CONFIG_DEVICE_DT_METADATA=n by hand, but I think the convenience is
worth the price as a default. If we're running a shell, then we've
already paid a heavy footprint penalty.
Example output for qemu_cortex_m3:
uart:~$ gpio devices
Device Other names
gpio@40004000 gpio0
gpio@40005000 gpio1
gpio@40006000 gpio2
gpio@40007000 gpio3
gpio@40024000 gpio4
gpio@40025000 gpio5
gpio@40026000 gpio6
Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
Removed the unnecessary initialization of the `ret` variable in
`gpio_stm32_clock_request` where its value is guaranteed to be
overwritten by subsequent operations, then simply returned `ret`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>