Remove address-of operator ('&') when assigning `clock_control_xxx_init`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/clock_control`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Smartbodn does not have dedicated USB clock.
For USB to work PLL needs to be turned on.
To allow for flexible configuration artificial USB clock
is added that can be operated via clock_control subsystem.
This new clock turns on PLL when USB subsystem is enabled.
PLL can also be request in DT if application requires
more speed.
PLL can be automatically turned off when USB enters suspend
state and application did not requested it.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This commit should deal with the followings:
1. PLL requires that VDD level be changed to 1V2 and then released
to 0V9 when it's turned off. Changing the VDD level should be
done when the regulator driver is available. Otherwise, the VDD
level will be fixed to 1V2 (reset value).
2. Check if PLL is allowed to be turned off as it might happen that
USB is enabled which is clocked by PLL.
3. Do not wait for the PLL to lock. This is now performed silently
when PLL is requested.
4. Before switching to PLL we should check if PLL is already enabled
as it might happen that PLL node is initially disabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
The CMAC uses lp_clk as a sleep clock so it has to be updated if
frequency of lp_clk has changed. This happens either after XTAL32K
settling or RCX calibration.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
1. Update the clock control driver so it can update timing settings for
QSPIC2 following system clock transitions (translated based on
AHB AMBA bus clock).
2. Remove the QSPIC related subroutines and use the respective HAL API
which is now available.
3. Add support for PM (CONFIG_PM_DEVICE). This is required as QSPIC2
register file is powered by PD_SYS which is turned off during device
sleep and so registers contents are lost (in contrast to QSPIC which
is used to drive the flash memory).
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
RC32K and RCX low power clocks require runtime calibration to work
correctly.
Frequency of those clock can differ from chip to chip, one constant
value from Kconfig may not be best when low power clock (sourced
from RCX or RC32K) is used for system tick.
This code modifies global z_clock_hw_cycles_per_sec variable that
is used when TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is enabled
in Kconfig.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
If RC32K oscillator was on during startup, calibration
work was never going to actually calibrate this oscillator.
It happen because lpc_clock_state.rc32k_started was only set when
oscillator was turned on after if was turned off.
Now lpc_clock_state.rc32k_started is also set when rc32k is already
started (possible during boot).
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
RCX and RC32K oscillators are not precisely trimmed.
This code allows to measure actual frequency of those two
oscillators.
Device tree binding were extended to specify calibration
interval. This interval (in seconds) is used to periodically
call work that will perform oscillator frequency measurement.
For XTAL32K settle time can be provided in device tree.
After this time (depending on actual oscillator used)
XTAL32K is assumed to be stable and low power clock driven by
XTAL32K is considered OK for precise usage in bluetooth.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
