Commit Graph

11 Commits

Author SHA1 Message Date
Andy Ross
dd33b37eff tests/sched/scheduler_api: samples/philosophers: Use SCHED_SCALABLE
These two tests ask for lots of priority levels, more than the 32
maximum allowed by SCHED_MULTIQ (which is by design: if you have
requirements like that DUMB or SCALABLE are better choices due to the
RAM overhead of MULTIQ), so the build will fail on boards that defined
MULTIQ as default.

Don't let the platform choose the scheduler backend, ask for SCALABLE
explicitly.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-07-03 17:09:15 -04:00
Carles Cufi
6eeeb2a3e5 tests: Fix sizing for several test for chips with 24KB of RAM
When adding the nRF52810, which has 24KB of RAM, some of the tests don't
compile anymore due to lack of SRAM. Address this by either filtering
the test out or reducing the amount of memory allocation.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-06-25 19:34:33 +02:00
Alberto Escolar Piedras
4a2d109a4b native tests: fix kernel sched preempt for arch posix
The test kernel.sched.preempt was hanging in the posix arch,
due to a busy wait loop in wakeup_src_thread() added in
a803af2fa7.

We fix it by halting the cpu to let time pass in the posix
arch.

Reenabling the testcase in this board by reverting
e8a906c29c

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-12 08:16:12 -04:00
Anas Nashif
e8a906c29c tests: disable preempt testcase for native_posix
Disabling testcase due to hang during sanitycheck run while we figure
out the real cause of this.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-06-11 21:13:23 -04:00
Alberto Escolar Piedras
252be0b909 tests/kernel/sched/preempt: enable test for native_posix
The native_posix board does model irq_offload properly now
and therefore this test can be executed without problems.
So let's enable it.

Related to commit:
86b5364335

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-11 17:25:58 -04:00
Wayne Ren
a91f1e5e14 tests: modify the test conditions for emsk_em7d_v22
Because the address and size alignment of MPUv2,
limite the thread numbers for emsk_em7d_v22.

If not, build will faill because of DCCM overflow

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-06-11 09:05:15 -05:00
Andy Ross
a803af2fa7 tests/kernel/preempt: Add yield and sleep cases
Scheduler choice is subtle across yield and k_sleep(), add calls to
those to the state table and validate that we're making the right
decisions.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-06-04 23:07:13 -04:00
Anas Nashif
f0f11289ad tests: schedule_api: change category to sched
Use kernel.sched instead of kernel.thread

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-28 08:52:46 -04:00
Anas Nashif
20e969b8f1 tests: schedule_api: fix references to tested APIs
Use @see instead of custom keyword.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-28 08:52:46 -04:00
Anas Nashif
c5be083df5 tests: move schedule_api under sched/
Group tests per area.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-28 08:52:46 -04:00
Andy Ross
86b5364335 tests/kernel: Add preemption priority test
This test exaustively tests preemption points between threads of all
priority classes (cooperative, preemptible, and metairq), done both
from a synchronous reschedule (via k_sem_give() and from interrupt
context (via irq_offload()), and with and without the sched_lock()
held.  It then detects the next thread that runs and validates vs. the
documented priority rules.

Note that there is a whitelisted case on ARM, where irq_offload()
seems not to be working like a true interrupt (it always returns to
the interrupted context and doesn't seem to hit the normal exception
return path which can context switch).  And native_posix is excluded
because of failures and the fact that it's actually never possible to
truly preempt a thread there (they run to completion inside _Swap()
et. al. and then block themselves).  Both of these should be fixable
in the future but don't (seem to) directly relate to this test.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-05-25 09:40:55 -07:00