Commit Graph

61 Commits

Author SHA1 Message Date
Jay Vasanth
9777c5e90e drivers: peci: Microchip XEC PECI driver add MEC172x support
Update Microchip XEC PECI driver to support MEC172x.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:16:41 +02:00
Jay Vasanth
822e3bb612 drivers: peci: Microchip XEC PECI driver standardize
Standarize device structure usage for mchp peci driver

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:16:41 +02:00
Jay Vasanth
b0cfaa44cd drivers: tach: Microchip XEC TACH driver add MEC172x support
Update Microchip XEC TACH driver to support MEC172x.
Standardize device tree properties between chips.
Standardize device structure usage.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-31 10:30:17 +02:00
Jeff Daly
dfe05d2898 Microchip: MEC172x fix p80bd0 direct NVIC input number
Fixed Port 80 direct NVIC input number.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2022-03-24 15:37:33 -05:00
Jeff Daly
c5f75d6be5 Microchip: MEC172x fix acpi_ec direct NVIC input numbers
Fix the direct NVIC input numbers for acpi_ec[1-4].

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2022-03-24 15:37:33 -05:00
Jeff Daly
b7802574ff Microchip: MEC172x fix kbc IBF direct NVIC input number
Fixed 8042 IBF direct NVIC input number.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2022-03-24 15:37:33 -05:00
Jay Vasanth
845c1185a2 drivers: pwm: Microchip XEC PWM add MEC172x support
Add support for MEC172x series to Microchip XEC PWM driver.
Standardize device tree properties for both SoC families.
Standardize device structure usage.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-21 21:49:50 -04:00
Nazar Kazakov
f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Jay Vasanth
73f24056d5 kscan: update mchp keyscan module to use pinctrl
Changes to keyscan module to support pinctrl

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Jay Vasanth
cfe9a960f0 pinmux: Remove pinmux.c source file
Since we are moving to pinctrl, removing pinmux.c
from mec172x board folder and removing pinmux from dts

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Jay Vasanth
5917ab9009 dts: Update MEC172x pinctrl dts
Update dtsi and dts bindings for pinctrl driver

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Jay Vasanth
9f3d90e283 drivers: bbram: Add bbram driver for mec device
Add bbram driver for Microchip mec device

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-02-21 22:17:52 -05:00
Jay Vasanth
f6394e0d54 Microchip: MEC172x: kscan driver
Update keyscan driver to support MEC172x device

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-02-21 20:44:17 -05:00
Jay Vasanth
4120a889a4 Microchip: MEC172x: watchdog driver
Update wdt driver to support MEC172x device

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-02-21 20:42:18 -05:00
Aditya Bhutada
31de8caa9c dts: bindings: adc: microchip: Introduced clk_time field
Added clk_time field to configure Microchip ADC config register.
This allows programming ADC_CLK_HIGH_TIME & ADC_CLK_LOW_TIME register
values.

Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
2021-12-22 13:47:18 -05:00
Jay Vasanth
fd43c725d2 drivers: spi: Add MEC172x QMSPI-LDMA driver
Add driver for MEC172x QMSPI with local DMA(LDMA). The driver
support SPI asynchronous operation.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-12-08 08:43:05 -05:00
Jay Vasanth
c214c59548 Microchip: MEC172x: eSPI driver
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-10-26 09:27:20 -04:00
Scott Worley
145673d57a Microchip: MEC172x: I2C driver
Microchip MEC172x series I2C driver implementing controller
and target modes. The driver implemenents its own I2C port
pin control functions and does not depended upon pinmux. Future
updates will make use of PINCTRL when that subystem is finalized.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-25 13:07:45 -04:00
Scott Worley
19dd46ef68 Microchip: MEC172x: ADC driver
Add ADC driver version 2 for MEC172x using new in-tree headers
and device tree properties. Update the ADC shell for the new driver.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-11 19:44:31 -04:00
Scott Worley
ad19104f28 Microchip: MEC172x: Add UART driver
Microchip XEC has been using the standard NS16550 driver.
Using the standard NS16550 driver requires extra HW programming
for XEC UART in board level and did not support XEC GIRQ interrupt
programming. We add an XEC specific driver and remove UART specific
register programming from the board level and implement interrupt
support. Also, by implementing a SoC specific driver we can add
driver PM in the future.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-09 16:21:33 -04:00
Scott Worley
7075b700b7 Microchip: MEC172x: Device tree constant property cleanup
Microchip XEC two custom DT properies girqs and pcrs cell sizes
are defined as constants. There is no need to replicate these
is the chip DTSI since the value cannot be changes. Fix the syntax
of the cell size constant to match the naming convention used
thoughout DT.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-09 13:06:01 -04:00
Scott Worley
2070c0997f Microchip: MEC172x: Update pinmux driver
Update the Microchip XEC pinmux driver to use system I/O
routine for read/write of registers instead of direct use
of volatile and CMSIS defines. Add GPIO port number to
bindings instead of using hard coded value from chip headers.
Modify SoC DTSI pinmux syntax, requires "pinmux: pinumx {..."
or the DT macros will not work. Since pinmux is used by MEC152x
we update its chip pinmux DT.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-03 19:04:56 -04:00
Scott Worley
6976800cf0 Microchip: MEC172x GPIO driver version 2
Create version 2 of the MEC GPIO driver to support MEC172x to not
interfere with MEC152x. When the MEC172x ECIA interrupt aggregator
driver is ready, this driver will use ECIA for registering GPIO
interrupt callbacks instead of maintaining its own interrupt table.
Add V2 DT binding.
Add the Kconfig configuration settings for the MEC172x GPIO
V2 driver at the SoC and board level.
Add port id to DT allowing use of DT FOR EACH macro in the driver.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-27 18:01:55 -04:00
Scott Worley
dd1a9559be Microchip: XEC RTOS timer: Add MEC172x support to driver
Update Microchip XEC RTOS timer driver adding MEC172x support and
using more device tree properities in the driver. We must also update
the XEC counter driver to use the new GIRQ DT properties.
Add new properties to RTOS timer and RTC timer YAML. These two timers
are linked due to option using a high speed timer for kernel busy wait.
Add Kconfig logic for XEC RTOS timer to MEC172x SoC.
Enable the Microchip XEC RTOS timer in the MEC172x evaluation board.
Add device tree nodes for most peripeherals.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-27 09:29:34 -04:00
Andrzej Puzdrowski
1e4529a7a3 drivers/eeprom/eeprom_emulator: fix mutex usage with rambuf
In the eeprom read operation, when rambuf was available
mutex was not unlocked after the read. Consequence of that is
that device was blocked after that read for incoming operations.

This commit fixes the issue

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-07-26 19:29:23 -04:00
Scott Worley
6b3749d2ff Microchip: MEC172x Add aggregated interrupt driver
Add driver implementation and header files for a MEC172x
aggregated interrupt driver. Enable the parent(ECIA) node
to have the driver initialize interrupt hardware for use.
Enable child nodes for those GIRQs used for aggregation.
Refer to chip documention for the list of GIRQs restricted
to aggregation and those which support direct mode.
Add chip level device tree node for MEC172x EC interrupt
aggregator parent and GIRQ children. Each child node contains
a list of sources representing the source bit position in the
GIRQ registers.
Add DT bindings for ECIA and GIRQ nodes.
Add build file(s) and configuration items for the MEC172x ECIA
aggregated interrupt driver. Add and enable the MEC172x interrupt
driver on the MEC172x evaluation board(EVB). Enable parent node to
initialize ECIA hardware. Child nodes are left disabled until a
future driver needs them.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-26 12:24:52 -04:00
Scott Worley
d3f6b54f8e Microchip: MEC172x clock control driver
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-21 17:46:07 -04:00
Scott Worley
5b5396f7b6 Microchip: MEC172x add board and update for minimal build
Added minimal device tree and board files to build Microchip
MEC172x. SOC layer stripped down to allow build for checking
compilation only.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-19 21:07:31 +03:00
Jose Alberto Meza
164f2cdf1a dts: arm: mchp: Add missing eSPI interrupt
eSPI controller can generate another IRQ for extended/custom
virtual wires.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-07 23:52:17 -04:00
Kumar Gala
147bb6b9f3 arm: microchip: mec1501hsz: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:29:34 -05:00
Scott Worley
2b926db4e1 drivers: espi: Microchip eSPI add SAF support
Add ESPI SAF features to the Microchip eSPI driver as
a separate file. ESPI SAF depends upon the core eSPI
driver adding the ability to attach the system SPI
flash to the EC eSPI endpoint instead of the host
eSPI controller.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-02-15 08:22:01 -05:00
Flavio Ceolin
b7e4e982e1 dts: mec1501hsz: Add cpu label
Add label to facilitate add cpu-idle-states later.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Rajavardhan Gundi
8751816745 drivers: i2c_mchp_xec: Enable slave mode support
Enable slave support for I2C device instances. Slave mode is
interrupt based, wheras master mode is still based on polling.

Remove ENI bit in master configuration since it is not needed for
master mode.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2021-01-20 14:16:27 -05:00
Francisco Munoz
7c3504b1c9 dts: bindings: microchip,xec-i2c: Add GIRQ fields
Add the girq and girq-bit fields to the binding. This allows
encoding GIRQ related information inside device tree.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2021-01-20 14:16:27 -05:00
Kumar Gala
184a25769c arm: systick: default CORTEX_M_SYSTICK based on dts
Use setting from devicetree to drive the default setting for
CORTEX_M_SYSTICK.  We update the dts files to default systick to be
enabled since the major of cortex-m platforms utilize it by default
(except on Nordic SoCs, TI CC13x2/CC26x2 and MEC1501 in which we
default to disabled).

Fixes #25299

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-09-10 09:49:00 +02:00
Daniel Leung
13ef99831a drivers: gpio: mchp_xec: Convert to using new device tree macros
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.

The pinmux_mchp_xec is also being updated since it's using DT
from GPIO.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-28 07:43:31 -05:00
Daniel Leung
5692702248 drivers: pinmux: mchp_xec: Convert to using new device tree macros
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-28 07:43:31 -05:00
Timo Teräs
6fd168e9a1 driver: uart: ns16550: convert to DT_INST_*
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.

Signed-off-by: Timo Teräs <timo.teras@iki.fi>
2020-03-14 02:22:05 +02:00
Jose Alberto Meza
0b6b2bc17c dts: peci: mchp: Add dts bindings for XEC PECI driver
Add device for PECI driver for MEC family

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-03-13 18:53:04 +02:00
Francisco Munoz
98bef9a08c dts: bindings: tach: Add nodes and bindings for tachometer
Introduction of tachometer device nodes for the Microchip
MEC1501 SOC. In addition, dts bindings for are also introduced.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2020-03-13 08:49:21 -05:00
Daniel Leung
90ac56100c dts: mec1501hsz: add GIRQ fields for RTOS timer
This specifies the GIRQ related fields to the mec1501hsz
device tree file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-11 21:16:16 -04:00
Kumar Gala
22246f89dc dts: microchip,xec-ps2: Add properties for GIRQ info
Add girq and girq-bit to encode per device information.  This allows the
driver to get any device unique info from device tree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Kumar Gala
9ed4f39110 dts: microchip,xec-timer: Add properties for GIRQ info
Add girq and girq-bit to encode per device information.  This allows the
driver to get any device unique info from device tree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-11 07:59:38 -06:00
Jose Alberto Meza
da87abd971 dts: arm: microchip: Adjust DT IRQ priorities
Adjust default IRQ priorities.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-28 20:13:36 +02:00
Daniel Leung
6ecb36cbe0 dts: arm: mec1501hsz: rename I2C nodes
The I2C controllers on the MEC1501 SoC can be attached to
different I2C output line. For example, the I2C #0 controller
can be used with I2C7 physical lines out of SoC. The output
selection is done by the attribute "port_sel". This renames
the parent I2C nodes on the SoC side to refer to
the controller themselves instead of the output lines to
avoid confusion. The labels of these nodes are also renamed
to reflect the controllers.

On the board level, the DTS labels are overwritten to indicate
the actual output lines.

Aliases are also provided in both SoC and board levels to
provide shortcuts to the DTS nodes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-18 13:33:20 -05:00
Scott Worley
c8b1eb79a1 drivers : spi : mec1501 : XEC SPI driver
SPI driver for MEC1501 QMSPI supporting synchronous only.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-10-23 19:18:32 -07:00
Francisco Munoz
8a12d40a72 dts: bindings: kscan: Add dts entries and bindings for kscan
Indtroduction of generic device tree bindings for keyboard scan devices.
In addition, device tree node entries and dt specific bindings where
also implemented for Microchip MEC1501

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-10-16 13:29:21 -07:00
Tomasz Bursztyka
bce525fdcf dts/arm: Add support for the ADC in MEC1501hsz
It has one instance.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-25 06:12:52 -04:00
Jose Alberto Meza
ac16bf7f4c dts: espi: Cleanup eSPI block device tree
Move MCHP-defined NVIC interrupts to interrupts field.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-20 14:30:40 -04:00
Tomasz Bursztyka
bea2714cae dts/arm: Add the 9 MEC1501 PWM instances.
All disabled by default.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-09-19 20:45:37 -04:00