Added device tree nodes in imx8mp_evk_mimx8ml8_a53.dts, and also
added board overlay in gpio_basic_api test case.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
clean up usage of usage "#ifdef STM32_SRC_SYSCLK"
and code under the "#else" from
test_stm32_clock_configuration_adc.c.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
The current watchdog tests assume that watchdog can be configured once
it is running. This is a concept that do not work in practice becasue
most of watchdog once configured will be locked. The tests should take
that in consideration before enable another test. The other important
details is that even when a watchdog is running it should be disable in
some controllers to allow reconfigure.
This change was tested with SAM4L watchdog controller #83475 which
allows reconfigure the watchdog once it is enabled. To do the correct
configuration it is necessary execute the wdt_disable() call.
The change will validate if the watchdog can be disabled for those
cases were the controller is not locked and fallback the test on the
contrary.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
- add nucleo_c071rb overlay file to setup spi and dma nodes
- Add the nucleo_c071rb configuration file to reduce the size of
SPI_LARGE_BUFFER_SIZE to avoid RAM overflow and be able
to run the test.
- update testcase.yaml for CI integration
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
- add overlays and kconfig files for nucleo_c071rb board.
- update testcase.yaml for CI integration.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
add the nucleo_C071rb overlay file and enable different types of timers
that support counters.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
- add nucleo_c071rb overlay file to setup adc node
- The C0 serie has two HSI clock sources, HSI48 and HSI48USB.
To make it simpler and compatible with the existing clock driver,
HSI48 is renamed to HSI (node already present in the stm32c0.dtsi).
HSI48USB will correspond to HSI48.
With SYNC mode, we have an overrun on the ADC, so we configure it
in ASYNC mode.
- Update STM32 HSI macro according to changes
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add wsen_pads_2511020213301 driver with
the corrected name and compatibility with
the hal update as well as added new features.
Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
The test case drivers.eeprom.emul.build requires around 48-58kB of
RAM and 95-119kB of ROM/flash, increase and add these requirenments
to the test case. Similarly add min flash requirenment to
drivers.eeprom.build
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The stepper driver test cases only specify integration
platforms, which whitelists every other board in tree
for full CI runs. This is not intended as some platforms
are too small to run the test cases.
Whitelist target platforms using platform_allow instead.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The update callback remains enabled after the test finishes, leaving the
RTC in a modified state. This change ensures the callback is properly
disabled, restoring the RTC to its original condition.
Signed-off-by: Måns Ansgariusson <Mansgariusson@gmail.com>
Include the Epson RX8130CE RTC driver in the RTC build tests to ensure it
compiles correctly and remains free of build regressions.
Signed-off-by: Måns Ansgariusson <Mansgariusson@gmail.com>
Add test support for Counter driver of RZ/G3S-SMARC
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Add overlays for xg24_dk2601b and xg27_dk2602a for the accuracy test.
Update the api test to use named macros for readability.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Test was staring a TX transfer and aborting it after 300 us from
the timer handler. Test was assuming that ongoing transfer will
not finish in those 300 us. This might not be true for higher
baudrates. Instead of using fixed timeout, a value is calculated
from the baudrate and targets to abort the transfer after approx.
20 bytes of 95 byte long transfer.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add build test configurations for the silabs_acmp comparator. Enable this
build testing on all series 2 silabs boards that currently support the
comparator driver.
Signed-off-by: Christian Galante <christian.galante@silabs.com>
Add board overlays to execute the comparator gpio_loopback testsuite on
xg24_dk2601b and xg29_rb4412a. The testsuite was executed and was seen
to pass on both boards locally with twister.
Signed-off-by: Christian Galante <christian.galante@silabs.com>
the adc0 node is now disabled by default in the soc
enable it so that adc test passes for this board
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
