diff --git a/boards/arm/mr_canhubk3/doc/index.rst b/boards/arm/mr_canhubk3/doc/index.rst
index a26b6dd3ec2..63dbb36666b 100644
--- a/boards/arm/mr_canhubk3/doc/index.rst
+++ b/boards/arm/mr_canhubk3/doc/index.rst
@@ -48,6 +48,7 @@ Interface     Controller  Driver/Component
 SIUL2         on-chip     | pinctrl
                           | gpio
                           | external interrupt controller
+WKPU          on-chip     interrupt controller
 LPUART        on-chip     serial
 QSPI          on-chip     flash
 FLEXCAN       on-chip     can
@@ -70,6 +71,21 @@ Each GPIO port is divided into two banks: low bank, from pin 0 to 15, and high
 bank, from pin 16 to 31. For example, ``PTA2`` is the pin 2 of ``gpioa_l`` (low
 bank), and ``PTA20`` is the pin 4 of ``gpioa_h`` (high bank).
 
+The GPIO controller provides the option to route external input pad interrupts
+to either the SIUL2 EIRQ or WKPU interrupt controllers, as supported by the SoC.
+By default, GPIO interrupts are routed to SIUL2 EIRQ interrupt controller,
+unless they are explicity configured to be directed to the WKPU interrupt
+controller, as outlined in :zephyr_file:`dts/bindings/gpio/nxp,s32-gpio.yaml`.
+
+To find information about which GPIOs are compatible with each interrupt
+controller, refer to the device reference manual.
+
+.. note::
+
+   It is important to highlight that the current board configuration lacks
+   support for wake-up events and power-management features. WKPU functionality
+   is restricted solely to serving as an interrupt controller.
+
 LEDs
 ----