From f4cccd66de77d8daa23b0d3d75a2dfdaff8bbd44 Mon Sep 17 00:00:00 2001 From: Vincent Geneves Date: Thu, 6 Oct 2022 17:10:23 +0200 Subject: [PATCH] dts: arm: stm32: add dts support for ADC2/3 of stm32f7 This PR enables the ADC peripheral 2 & 3 for the stm32F7 soc series from STMicroelectronics. Signed-off-by: Vincent Geneves --- dts/arm/st/f7/stm32f7.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi index 9d9945b6e23..b36384089fd 100644 --- a/dts/arm/st/f7/stm32f7.dtsi +++ b/dts/arm/st/f7/stm32f7.dtsi @@ -624,7 +624,7 @@ adc1: adc@40012000 { compatible = "st,stm32-adc"; - reg = <0x40012000 0x400>; + reg = <0x40012000 0x50>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000100>; interrupts = <18 0>; status = "disabled"; @@ -634,6 +634,24 @@ has-vref-channel; }; + adc2: adc@40012100 { + compatible = "st,stm32-adc"; + reg = <0x40012100 0x50>; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000200>; + interrupts = <18 0>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + adc3: adc@40012200 { + compatible = "st,stm32-adc"; + reg = <0x40012200 0x50>; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>; + interrupts = <18 0>; + status = "disabled"; + #io-channel-cells = <1>; + }; + dac1: dac@40007400 { compatible = "st,stm32-dac"; reg = <0x40007400 0x400>;