From f2227bbd51d04114c447876e6fc7c1efccd12c5b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Tue, 4 Jun 2024 10:01:22 +0200 Subject: [PATCH] samples: drivers: clock_control_litex: clean up use of c domain roles MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Simplify how the code sample refers to C objects to be less dependant on Breathe. Signed-off-by: Benjamin Cabé --- samples/drivers/clock_control_litex/README.rst | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/samples/drivers/clock_control_litex/README.rst b/samples/drivers/clock_control_litex/README.rst index 0a7d7878cb2..eb01b39b994 100644 --- a/samples/drivers/clock_control_litex/README.rst +++ b/samples/drivers/clock_control_litex/README.rst @@ -45,12 +45,9 @@ This configuration defines 2 clock outputs: ``clk0`` and ``clk1`` with default f Driver Usage ************ -The driver is interfaced with the :ref:`Clock Control API ` function ``clock_control_on()`` and a LiteX driver specific structure: +The driver is interfaced with the :ref:`Clock Control API ` function ``clock_control_on()`` and a LiteX driver specific structure (:c:struct:`litex_clk_setup`). -.. doxygenstruct:: litex_clk_setup - :project: Zephyr - -| To change clock parameter it is needed to cast a pointer to structure ``litex_clk_setup`` onto ``clock_control_subsys_t`` and use it with ``clock_control_on()``. +| To change clock parameter it is needed to cast a pointer to structure :c:struct:`litex_clk_setup` onto :c:type:`clock_control_subsys_t` and use it with :c:func:`clock_control_on()`. | This code will try to set on ``clk0`` frequency 50MHz, 90 degrees of phase offset and 75% duty cycle. .. code-block:: c