drivers: spi: stm32h7: Avoid unnecessary FIFO flush
The RxFIFO is already flushed any time a transceive operation finishes, there is no need for doing it also before the transaction start. The aim of this change is to simplify the logic and to (potentially) reduce the minimum time between transactions. Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
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@ -823,13 +823,6 @@ static int transceive(const struct device *dev,
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi) */
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_fifo)
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/* Flush RX buffer */
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while (ll_func_rx_is_not_empty(spi)) {
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(void) LL_SPI_ReceiveData8(spi);
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}
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_fifo) */
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LL_SPI_Enable(spi);
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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@ -218,12 +218,13 @@ static inline void ll_func_set_fifo_threshold_16bit(SPI_TypeDef *spi)
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static inline void ll_func_disable_spi(SPI_TypeDef *spi)
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{
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_fifo)
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/* Flush RX buffer */
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while (LL_SPI_IsActiveFlag_RXP(spi)) {
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(void)LL_SPI_ReceiveData8(spi);
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while (ll_func_rx_is_not_empty(spi)) {
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(void) LL_SPI_ReceiveData8(spi);
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}
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#endif /* st_stm32h7_spi */
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_fifo) */
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LL_SPI_Disable(spi);
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while (LL_SPI_IsEnabled(spi)) {
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