From ed12786ee05edee5ef4ecc73bd08a90b98667eae Mon Sep 17 00:00:00 2001 From: Jun Lin Date: Thu, 28 Jul 2022 16:45:39 +0800 Subject: [PATCH] driver: clock_control: npcx: fix the power down of eSPI module This power down bit of eSPI module is loacted in the bit 7 of PWDWN_CTL6 register rather than the bit 4. This commit fixs the incorrect setting. Signed-off-by: Jun Lin --- drivers/clock_control/clock_control_npcx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clock_control/clock_control_npcx.c b/drivers/clock_control/clock_control_npcx.c index 34dd0fb0e8c..047676d53d7 100644 --- a/drivers/clock_control/clock_control_npcx.c +++ b/drivers/clock_control/clock_control_npcx.c @@ -222,7 +222,7 @@ static int npcx_clock_control_init(const struct device *dev) NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL5) = 0xFA; #if CONFIG_ESPI /* Don't gate the clock of the eSPI module if eSPI interface is required */ - NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL6) = 0xEF; + NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL6) = 0x7F; #else NPCX_PWDWN_CTL(pmc_base, NPCX_PWDWN_CTL6) = 0xFF; #endif