From eb2f5ceb196b51e9a465b905c20a99ce1de4fd2b Mon Sep 17 00:00:00 2001 From: Ali Hozhabri Date: Wed, 25 Oct 2023 11:02:20 +0200 Subject: [PATCH] dts: bindings: spi: add support to set CPOL, CPHA, and HOLD_CS in dts file Add support to set SPI clock polarity (CPOL), clock phase (CPHA), and hold-on-cs in a dts file to get rid of using related macros in spi.c driver since each board may work on a different SPI mode rather than the default one (based on CPOL and CPHA). Signed-off-by: Ali Hozhabri --- dts/bindings/spi/spi-device.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/dts/bindings/spi/spi-device.yaml b/dts/bindings/spi/spi-device.yaml index f820863b30d..6915b664890 100644 --- a/dts/bindings/spi/spi-device.yaml +++ b/dts/bindings/spi/spi-device.yaml @@ -40,3 +40,21 @@ properties: enum: - 0 - 32768 + spi-cpol: + type: boolean + description: | + SPI clock polarity which indicates the clock idle state. + If it is used, the clock idle state is logic high; otherwise, low. + spi-cpha: + type: boolean + description: | + SPI clock phase that indicates on which edge data is sampled. + If it is used, data is sampled on the second edge; otherwise, on the first edge. + spi-hold-cs: + type: boolean + description: | + In some cases, it is necessary for the master to manage SPI chip select + under software control, so that multiple spi transactions can be performed + without releasing it. A typical use case is variable length SPI packets + where the first spi transaction reads the length and the second spi transaction + reads length bytes.