diff --git a/boards/arm/mimxrt685_evk/Kconfig.defconfig b/boards/arm/mimxrt685_evk/Kconfig.defconfig index 378320fb1ce..7708c7a7168 100644 --- a/boards/arm/mimxrt685_evk/Kconfig.defconfig +++ b/boards/arm/mimxrt685_evk/Kconfig.defconfig @@ -14,6 +14,16 @@ config XTAL_SYS_CLK_HZ config SYSOSC_SETTLING_US default 260 +config FLASH_MCUX_FLEXSPI_MX25UM51345G + default y if FLASH + +config FLASH_MCUX_FLEXSPI_XIP + default y if FLASH + +choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET + default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM +endchoice + if GPIO_MCUX_LPC config GPIO_MCUX_LPC_PORT0 diff --git a/boards/arm/mimxrt685_evk/doc/index.rst b/boards/arm/mimxrt685_evk/doc/index.rst index 5f728f37c39..a6c186138b3 100644 --- a/boards/arm/mimxrt685_evk/doc/index.rst +++ b/boards/arm/mimxrt685_evk/doc/index.rst @@ -71,6 +71,8 @@ features: +-----------+------------+-------------------------------------+ | GPIO | on-chip | gpio | +-----------+------------+-------------------------------------+ +| FLASH | on-chip | OctalSPI Flash | ++-----------+------------+-------------------------------------+ | USART | on-chip | serial port-polling | +-----------+------------+-------------------------------------+ | I2C | on-chip | i2c | @@ -127,6 +129,28 @@ functionality of a pin. +---------+-----------------+----------------------------+ | PIO0_9 | I2S | I2S DATAIN | +---------+-----------------+----------------------------+ +| PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_12 | PIO2_12 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash | ++---------+-----------------+----------------------------+ +| PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash | ++---------+-----------------+----------------------------+ System Clock ============ diff --git a/boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts b/boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts index 08ea139bdf7..cb469b976e1 100644 --- a/boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts +++ b/boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts @@ -170,6 +170,30 @@ i2s1: &flexcomm3 { dma-names = "tx"; }; +&flexspi { + reg = <0x50134000 0x4000>, <0x18000000 DT_SIZE_M(64)>; + mx25um51345g: mx25um51345g@2 { + compatible = "nxp,imx-flexspi-mx25um51345g"; + size = <536870912>; + label = "MX25UM51345G"; + reg = <2>; + spi-max-frequency = <200000000>; + status = "okay"; + jedec-id = [c2 81 3a]; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + storage_partition: partition@3f00000 { + label = "storage"; + reg = <0x03f00000 DT_SIZE_M(1)>; + }; + }; + }; +}; + &gpio0 { status = "okay"; }; diff --git a/boards/arm/mimxrt685_evk/pinmux.c b/boards/arm/mimxrt685_evk/pinmux.c index 2aa6d713214..79373d268ee 100644 --- a/boards/arm/mimxrt685_evk/pinmux.c +++ b/boards/arm/mimxrt685_evk/pinmux.c @@ -396,6 +396,239 @@ static int mimxrt685_evk_pinmux_init(const struct device *dev) /* PORT0 PIN9 (coords: L3) is configured as FC1_RXD_SDA_MOSI_DATA */ IOPCTL_PinMuxSet(IOPCTL, 0U, 9U, port0_pin9_config); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexspi), okay) && CONFIG_FLASH +const uint32_t port1_pin11_config = (/* Pin is configured as FLEXSPI0B_DATA0 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT1 PIN11 (coords: L2) is configured as FLEXSPI0B_DATA0 */ +IOPCTL_PinMuxSet(IOPCTL, 1U, 11U, port1_pin11_config); + +const uint32_t port1_pin12_config = (/* Pin is configured as FLEXSPI0B_DATA1 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT1 PIN12 (coords: M2) is configured as FLEXSPI0B_DATA1 */ +IOPCTL_PinMuxSet(IOPCTL, 1U, 12U, port1_pin12_config); + +const uint32_t port1_pin13_config = (/* Pin is configured as FLEXSPI0B_DATA2 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT1 PIN13 (coords: N1) is configured as FLEXSPI0B_DATA2 */ +IOPCTL_PinMuxSet(IOPCTL, 1U, 13U, port1_pin13_config); + +const uint32_t port1_pin14_config = (/* Pin is configured as FLEXSPI0B_DATA3 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT1 PIN14 (coords: N2) is configured as FLEXSPI0B_DATA3 */ +IOPCTL_PinMuxSet(IOPCTL, 1U, 14U, port1_pin14_config); + +const uint32_t port1_pin29_config = (/* Pin is configured as FLEXSPI0B_SCLK */ + IOPCTL_PIO_FUNC5 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT1 PIN29 (coords: U3) is configured as FLEXSPI0B_SCLK */ +IOPCTL_PinMuxSet(IOPCTL, 1U, 29U, port1_pin29_config); + +const uint32_t port2_pin12_config = (/* Pin is configured as PIO2_12 */ + IOPCTL_PIO_FUNC0 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Disable input buffer function */ + IOPCTL_PIO_INBUF_DI | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Normal drive */ + IOPCTL_PIO_FULLDRIVE_DI | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN12 (coords: T3) is configured as PIO2_12 */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 12U, port2_pin12_config); + +const uint32_t port2_pin17_config = (/* Pin is configured as FLEXSPI0B_DATA4 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN17 (coords: U1) is configured as FLEXSPI0B_DATA4 */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 17U, port2_pin17_config); + +const uint32_t port2_pin18_config = (/* Pin is configured as FLEXSPI0B_DATA5 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN18 (coords: R2) is configured as FLEXSPI0B_DATA5 */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 18U, port2_pin18_config); + +const uint32_t port2_pin19_config = (/* Pin is configured as FLEXSPI0B_SS0_N */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN19 (coords: T2) is configured as FLEXSPI0B_SS0_N */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 19U, port2_pin19_config); + +const uint32_t port2_pin22_config = (/* Pin is configured as FLEXSPI0B_DATA6 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN22 (coords: P3) is configured as FLEXSPI0B_DATA6 */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 22U, port2_pin22_config); + +const uint32_t port2_pin23_config = (/* Pin is configured as FLEXSPI0B_DATA7 */ + IOPCTL_PIO_FUNC6 | + /* Disable pull-up / pull-down function */ + IOPCTL_PIO_PUPD_DI | + /* Enable pull-down function */ + IOPCTL_PIO_PULLDOWN_EN | + /* Enables input buffer function */ + IOPCTL_PIO_INBUF_EN | + /* Normal mode */ + IOPCTL_PIO_SLEW_RATE_NORMAL | + /* Full drive enable */ + IOPCTL_PIO_FULLDRIVE_EN | + /* Analog mux is disabled */ + IOPCTL_PIO_ANAMUX_DI | + /* Pseudo Output Drain is disabled */ + IOPCTL_PIO_PSEDRAIN_DI | + /* Input function is not inverted */ + IOPCTL_PIO_INV_DI); +/* PORT2 PIN23 (coords: P5) is configured as FLEXSPI0B_DATA7 */ +IOPCTL_PinMuxSet(IOPCTL, 2U, 23U, port2_pin23_config); #endif return 0; diff --git a/dts/bindings/mtd/nxp,imx-flexspi-mx25um51345g.yaml b/dts/bindings/mtd/nxp,imx-flexspi-mx25um51345g.yaml new file mode 100644 index 00000000000..a7cea2d55a4 --- /dev/null +++ b/dts/bindings/mtd/nxp,imx-flexspi-mx25um51345g.yaml @@ -0,0 +1,8 @@ +# Copyright 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +description: NXP FlexSPI MX25UM51345G + +compatible: "nxp,imx-flexspi-mx25um51345g" + +include: ["nxp,imx-flexspi-device.yaml", soc-nv-flash.yaml]