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samples: counter: alarm: add support for GD32 boards

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Add support for boards that implements the GD32 SoCs.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit is contained in:
TOKITA Hiroshi 2022-06-27 01:55:07 +09:00 committed by Carles Cufí
parent fb02624eda
commit e965db984d
13 changed files with 113 additions and 8 deletions
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14
drivers/counter/counter_gd32_timer.c
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@ -45,8 +45,8 @@ struct counter_gd32_config {
struct reset_dt_spec reset;
uint16_t prescaler;
void (*irq_config)(const struct device *dev);
void (*set_irq_pending)();
uint32_t (*get_irq_pending)();
void (*set_irq_pending)(void);
uint32_t (*get_irq_pending)(void);
};
static uint32_t get_autoreload_value(const struct device *dev)
@ -92,22 +92,22 @@ static void set_prescaler(const struct device *dev, uint16_t prescaler)
}
static void set_compare_value(const struct device *dev, uint16_t chan,
uint32_t now)
uint32_t compare_value)
{
const struct counter_gd32_config *config = dev->config;
switch (chan) {
case 0:
TIMER_CH0CV(config->reg) = now;
TIMER_CH0CV(config->reg) = compare_value;
break;
case 1:
TIMER_CH1CV(config->reg) = now;
TIMER_CH1CV(config->reg) = compare_value;
break;
case 2:
TIMER_CH2CV(config->reg) = now;
TIMER_CH2CV(config->reg) = compare_value;
break;
case 3:
TIMER_CH3CV(config->reg) = now;
TIMER_CH3CV(config->reg) = compare_value;
break;
}
}

10
samples/drivers/counter/alarm/boards/gd32e103v_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <29999>;
};

10
samples/drivers/counter/alarm/boards/gd32e507v_start.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <44999>;
};

10
samples/drivers/counter/alarm/boards/gd32e507z_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <44999>;
};

10
samples/drivers/counter/alarm/boards/gd32f350r_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <26999>;
};

10
samples/drivers/counter/alarm/boards/gd32f403z_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <41999>;
};

10
samples/drivers/counter/alarm/boards/gd32f407v_start.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <41999>;
};

10
samples/drivers/counter/alarm/boards/gd32f450i_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <49999>;
};

10
samples/drivers/counter/alarm/boards/gd32f450v_start.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <49999>;
};

10
samples/drivers/counter/alarm/boards/gd32f450z_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <49999>;
};

10
samples/drivers/counter/alarm/boards/gd32f470i_eval.overlay Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*/
&timer0 {
status = "okay";
prescaler = <59999>;
};

5
samples/drivers/counter/alarm/sample.yaml
View File

@ -6,7 +6,10 @@ tests:
harness: console
platform_allow: nucleo_f746zg nrf51dk_nrf51422 nrf52dk_nrf52832
nrf52840dk_nrf52840 nrf9160dk_nrf9160 atsamd20_xpro
bl5340_dvk_cpuapp
bl5340_dvk_cpuapp gd32e103v_eval gd32e507z_eval
gd32f403z_eval gd32f450i_eval gd32f450z_eval
gd32e507v_start gd32f407v_start gd32f450v_start
gd32f470i_eval
integration_platforms:
- nucleo_f746zg
harness_config:

2
samples/drivers/counter/alarm/src/main.c
View File

@ -35,6 +35,8 @@ struct counter_alarm_cfg alarm_cfg;
#define TIMER DT_NODELABEL(ctimer0)
#elif defined(CONFIG_COUNTER_NXP_S32_SYS_TIMER)
#define TIMER DT_NODELABEL(stm0)
#elif defined(CONFIG_COUNTER_TIMER_GD32)
#define TIMER DT_NODELABEL(timer0)
#endif
static void test_counter_interrupt_fn(const struct device *counter_dev,