From e1248eff825381317d48859fdff12380e79e84b7 Mon Sep 17 00:00:00 2001 From: IBEN EL HADJ MESSAOUD Marwa Date: Mon, 30 Jun 2025 09:04:33 +0200 Subject: [PATCH] drivers: clock_control: set voltage scaling before PLL Move the call to prepare_regulator_voltage_scale() before PLL setup in clock_stm32_ll_h7.c. This ensures the voltage regulator is configured to the appropriate voltage scale before increasing the system clock frequency via PLLs. Without this change, the system configuration may be out of spec. Signed-off-by: IBEN EL HADJ MESSAOUD Marwa --- drivers/clock_control/clock_stm32_ll_h7.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clock_control/clock_stm32_ll_h7.c b/drivers/clock_control/clock_stm32_ll_h7.c index 42977c65a50..d06000fd1ef 100644 --- a/drivers/clock_control/clock_stm32_ll_h7.c +++ b/drivers/clock_control/clock_stm32_ll_h7.c @@ -1011,15 +1011,15 @@ int stm32_clock_control_init(const struct device *dev) /* Set up individual enabled clocks */ set_up_fixed_clock_sources(); + /* Configure Voltage scale to comply with the desired system frequency */ + prepare_regulator_voltage_scale(); + /* Set up PLLs */ r = set_up_plls(); if (r < 0) { return r; } - /* Configure Voltage scale to comply with the desired system frequency */ - prepare_regulator_voltage_scale(); - /* Current hclk value */ old_hclk_freq = get_hclk_frequency(); /* AHB is HCLK clock to configure */