arch/x86: CPUs expose an unimplemented feature
Instruction cache related functions (see include/zephyr/arch/cache.h) are not implemented in x86, thus let's not set CONFIG_CPU_HAS_ICACHE which may end up in build failure if one sets CONFIG_ICACHE. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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@ -23,7 +23,6 @@ config CPU_ATOM
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select X86_CPU_HAS_SSE2
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select X86_CPU_HAS_SSE3
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
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This option signifies the use of a CPU from the Atom family.
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@ -41,7 +40,6 @@ config CPU_APOLLO_LAKE
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select X86_CPU_HAS_SSE41
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select X86_CPU_HAS_SSE42
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
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This option signifies the use of a CPU from the Apollo Lake family.
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@ -56,7 +54,6 @@ config CPU_LAKEMONT
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select X86_CPU_HAS_SSE3
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select X86_CPU_HAS_SSSE3
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
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This option signifies the use of a CPU from the Lakemont family.
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