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boards: arm: stm32: clean up dts after clock conversion

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Mass conversion of STM32 boards to dts based clock configuration has
left some minor whitespace issues. Fix these and some other whitespaces
in the affected files.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
This commit is contained in:
Ilya Tagunov 2021-05-07 20:50:04 +03:00 committed by Kumar Gala
parent b9a782b330
commit d75e982741
16 changed files with 15 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
boards/arm/disco_l475_iot1/disco_l475_iot1.dts
View File

@ -50,7 +50,7 @@
};
};
&clk_hsi{
&clk_hsi {
status = "okay";
};

3
boards/arm/mikroe_clicker_2/mikroe_clicker_2.dts
View File

@ -20,7 +20,6 @@
zephyr,ccm = &ccm0;
};
leds {
compatible = "gpio-leds";
ld1: led_1 {
@ -102,7 +101,6 @@
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>;
@ -130,7 +128,6 @@
pinctrl-0 = <&adc1_in2_pa2 &adc1_in3_pa3>;
};
mikrobus_1_i2c: &i2c3 {};
mikrobus_1_spi: &spi3 {};

1
boards/arm/nucleo_f303k8/nucleo_f303k8.dts
View File

@ -74,7 +74,6 @@
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
status = "okay";

2
boards/arm/nucleo_f401re/nucleo_f401re.dts
View File

@ -52,7 +52,7 @@
};
};
&clk_hse{
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";

2
boards/arm/nucleo_f411re/nucleo_f411re.dts
View File

@ -42,7 +42,7 @@
};
};
&clk_hse{
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";

1
boards/arm/nucleo_f429zi/nucleo_f429zi.dts
View File

@ -77,7 +77,6 @@
apb2-prescaler = <2>;
};
&adc1 {
pinctrl-0 = <&adc1_in0_pa0>;
status = "okay";

2
boards/arm/nucleo_g071rb/nucleo_g071rb.dts
View File

@ -43,7 +43,7 @@
};
};
&clk_hsi{
&clk_hsi {
status = "okay";
};

2
boards/arm/nucleo_g431rb/nucleo_g431rb.dts
View File

@ -51,7 +51,7 @@
};
};
&clk_hse{
&clk_hse {
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";
};

1
boards/arm/nucleo_h753zi/nucleo_h753zi.dts
View File

@ -58,7 +58,6 @@
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */

7
boards/arm/nucleo_l053r8/nucleo_l053r8.dts
View File

@ -43,10 +43,10 @@
};
};
&clk_hse{
status = "okay";
clock-frequency = <DT_FREQ_M(8)>;
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
@ -64,7 +64,6 @@
apb2-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
/* (Test cases fail due to 'SRAM' region overflow) */
&gpiod {status = "disabled";};

3
boards/arm/nucleo_l476rg/nucleo_l476rg.dts
View File

@ -63,7 +63,7 @@
};
};
&clk_hsi{
&clk_hsi {
status = "okay";
};
@ -135,7 +135,6 @@
status = "okay";
};
&timers2 {
status = "okay";

4
boards/arm/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi
View File

@ -9,7 +9,7 @@
#include "arduino_r3_connector.dtsi"
/ {
leds {
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
@ -34,7 +34,7 @@
};
};
&clk_msi{
&clk_msi {
status = "okay";
msi-range = <6>;
};

5
boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
View File

@ -83,12 +83,11 @@
};
};
&clk_hse{
&clk_hse {
status = "okay";
};
&clk_lse{
&clk_lse {
status = "okay";
};

1
boards/arm/ronoth_lodev/ronoth_lodev.dts
View File

@ -141,7 +141,6 @@
status = "okay";
};
&iwdg {
status = "okay";
};

2
boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts
View File

@ -102,8 +102,6 @@
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi5 {
pinctrl-0 = <&spi5_nss_pf6 &spi5_sck_pf7
&spi5_miso_pf8 &spi5_mosi_pf9>;

4
boards/arm/stm32l562e_dk/stm32l562e_dk_common.dtsi
View File

@ -51,13 +51,13 @@
};
};
&clk_msi{
&clk_msi {
status = "okay";
msi-range = <6>;
msi-pll-mode;
};
&clk_lse{
&clk_lse {
status = "okay";
};