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xtensa: remove CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC from arch

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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC should be defined at the SoC
or the board level since Xtensa cores are high configurable.
The default is just for ISS (Instruction Set Simulator). So
remove it from the arch level.

The xt-sim board is the only one in tree that is targeting
the ISS, so add it there.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2023-12-06 11:34:05 -08:00 committed by Carles Cufí
parent 3af390f6ed
commit d17524b86c
3 changed files with 8 additions and 7 deletions
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7
arch/xtensa/Kconfig
View File

@ -14,13 +14,6 @@ config SIMULATOR_XTENSA
help
Specify if the board configuration should be treated as a simulator.
config SYS_CLOCK_HW_CYCLES_PER_SEC
prompt "Hardware clock cycles per second, 2000000 for ISS"
default 2000000
range 1000000 1000000000
help
This option specifies hardware clock.
config XTENSA_NO_IPC
bool "Core has no IPC support"
select ATOMIC_OPERATIONS_C

2
boards/xtensa/xt-sim/xt-sim_defconfig
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@ -8,3 +8,5 @@ CONFIG_CONSOLE=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n
CONFIG_SIMULATOR_XTENSA=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=2000000

6
doc/releases/migration-guide-3.6.rst
View File

@ -259,6 +259,12 @@ Other Subsystems
zbus options are renamed. Instead, the new :kconfig:option:`ZBUS_MSG_SUBSCRIBER_BUF_ALLOC_DYNAMIC`
and :kconfig:option:`ZBUS_MSG_SUBSCRIBER_BUF_ALLOC_STATIC` options should be used.
Xtensa
======
* :kconfig:option:`CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC` no longer has a default in
the architecture layer. Instead, SoCs or boards will need to define it.
Recommended Changes
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