diff --git a/arch/arm/core/Kconfig.vfp b/arch/arm/core/Kconfig.vfp index 71c94b71ff1..6acb662d115 100644 --- a/arch/arm/core/Kconfig.vfp +++ b/arch/arm/core/Kconfig.vfp @@ -109,6 +109,18 @@ config VFP_U_DP_D16_FP16_FMAC fused multiply-accumulate) and floating-point exception trapping with 16 double-word registers. +config VFP_DP_D32_FMAC + bool + select CPU_HAS_VFP + select VFP_FEATURE_SINGLE_PRECISION + select VFP_FEATURE_DOUBLE_PRECISION + select VFP_FEATURE_FMAC + select VFP_FEATURE_REGS_S64_D32 + help + This option signifies the use of a VFP floating-point coprocessor + that supports single- and double-precision operations + (including fused multiply-accumulate) with 32 double-word registers. + config VFP_DP_D32_FP16_FMAC bool select CPU_HAS_VFP diff --git a/cmake/gcc-m-fpu.cmake b/cmake/gcc-m-fpu.cmake index aafe5b75c86..34b7ef5b22b 100644 --- a/cmake/gcc-m-fpu.cmake +++ b/cmake/gcc-m-fpu.cmake @@ -48,6 +48,14 @@ if("${ARCH}" STREQUAL "arm") elseif(CONFIG_CPU_AARCH32_CORTEX_A) if(CONFIG_CPU_CORTEX_A7) set(GCC_M_FPU vfpv4-d16) + elseif(CONFIG_CPU_CORTEX_A9) + set(GCC_M_FPU vfpv3) + if(NOT CONFIG_VFP_FEATURE_REGS_S64_D32) + set(GCC_M_FPU ${GCC_M_FPU}-d16) + endif() + if(CONFIG_VFP_FEATURE_HALF_PRECISION) + set(GCC_M_FPU ${GCC_M_FPU}-fp16) + endif() endif() endif() endif() diff --git a/soc/xlnx/zynq7000/xc7zxxx/Kconfig b/soc/xlnx/zynq7000/xc7zxxx/Kconfig index 4e2d138229d..4cf78faeec6 100644 --- a/soc/xlnx/zynq7000/xc7zxxx/Kconfig +++ b/soc/xlnx/zynq7000/xc7zxxx/Kconfig @@ -11,3 +11,4 @@ config SOC_SERIES_XC7ZXXX select CPU_CORTEX_A9 select SYSCON select ARM_ARCH_TIMER_ERRATUM_740657 if ARM_ARCH_TIMER + select VFP_DP_D32_FMAC diff --git a/soc/xlnx/zynq7000/xc7zxxxs/Kconfig b/soc/xlnx/zynq7000/xc7zxxxs/Kconfig index 5195a0c248b..6c3cd46393b 100644 --- a/soc/xlnx/zynq7000/xc7zxxxs/Kconfig +++ b/soc/xlnx/zynq7000/xc7zxxxs/Kconfig @@ -11,3 +11,4 @@ config SOC_SERIES_XC7ZXXXS select CPU_CORTEX_A9 select SYSCON select ARM_ARCH_TIMER_ERRATUM_740657 if ARM_ARCH_TIMER + select VFP_DP_D32_FMAC