diff --git a/boards/arm/pandora_stm32l475/Kconfig.board b/boards/arm/pandora_stm32l475/Kconfig.board new file mode 100644 index 00000000000..89ba1c54b98 --- /dev/null +++ b/boards/arm/pandora_stm32l475/Kconfig.board @@ -0,0 +1,8 @@ +# STM32L475 Pandora board configuration + +# Copyright (c) 2023 Tisilicon +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_PANDORA_STM32L475 + bool "STM32L475 Pandora Development Board" + depends on SOC_STM32L475XX diff --git a/boards/arm/pandora_stm32l475/Kconfig.defconfig b/boards/arm/pandora_stm32l475/Kconfig.defconfig new file mode 100644 index 00000000000..2d0f4e8c456 --- /dev/null +++ b/boards/arm/pandora_stm32l475/Kconfig.defconfig @@ -0,0 +1,11 @@ +# STM32L475 Pandora board configuration + +# Copyright (c) 2023 Tisilicon +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_PANDORA_STM32L475 + +config BOARD + default "pandora_stm32l475" + +endif # BOARD_PANDORA_STM32L475 diff --git a/boards/arm/pandora_stm32l475/board.cmake b/boards/arm/pandora_stm32l475/board.cmake new file mode 100644 index 00000000000..0da8e07b039 --- /dev/null +++ b/boards/arm/pandora_stm32l475/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=STM32L475VE" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/pandora_stm32l475/doc/img/pandora_stm32l475.jpg b/boards/arm/pandora_stm32l475/doc/img/pandora_stm32l475.jpg new file mode 100644 index 00000000000..0f280ba2424 Binary files /dev/null and b/boards/arm/pandora_stm32l475/doc/img/pandora_stm32l475.jpg differ diff --git a/boards/arm/pandora_stm32l475/doc/index.rst b/boards/arm/pandora_stm32l475/doc/index.rst new file mode 100644 index 00000000000..38623ac89f6 --- /dev/null +++ b/boards/arm/pandora_stm32l475/doc/index.rst @@ -0,0 +1,214 @@ +.. _stm32l475ve_pandora_board: + +ST STM32L475 Pandora +#################### + +Overview +******** + +The STM32L475 Pandora board features an ARM Cortex-M4 based STM32L475VE MCU +with a wide range of connectivity support and configurations. Here are +some highlights of the STM32L475 Pandora board: + + +- STM32L475Vx microcontroller featuring 1 Mbyte of Flash memory, 128 Kbytes of RAM in LQFP100 package +- On-board ST-LINK/V2-1 supporting USB re-enumeration capability +- Three different interfaces supported on USB: + + - Virtual com port + - Mass storage + - Debug port + +- Pushbutton (reset) +- Four directions Joystick with selection +- USB OTG FS with micro-AB connector +- SAI Audio DAC, Stereo with output jack +- Digital microphone, accelerometer, magnetometer and gyroscope MEMS +- 128-Mbit Quad-SPI Flash memory +- MCU current ammeter with 4 ranges and auto-calibration +- Connector for external board or RF-EEPROM +- Four power supply options: + - ST-LINK/V2-1 + - USB FS connector + - External 5 V + - CR2032 battery (not provided) + +.. image:: img/pandora_stm32l475.jpg + :align: center + :alt: STM32L475 Pandora + +More information about the board can be found at the `STM32L475 Pandora website`_. + +Hardware +******** + +The STM32L475VE SoC provides the following hardware features: + +- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode) +- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1) +- Clock Sources: + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) + - Internal low-power 32 kHz RC ( |plusminus| 5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by + LSE (better than |plusminus| 0.25 % accuracy) + - 3 PLLs for system clock, USB, audio, ADC +- RTC with HW calendar, alarms and calibration +- 16x timers: + - 2x 16-bit advanced motor-control + - 2x 32-bit and 7x 16-bit general purpose + - 2x 16-bit basic + - 2x low-power 16-bit timers (available in Stop mode) + - 2x watchdogs + - SysTick timer +- Up to 82 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V +- Memories + - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection + - Up to 128 KB of SRAM including 32 KB with hardware parity check + - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories + - Quad SPI memory interface +- 4x digital filters for sigma delta modulator +- Rich analog peripherals (independent supply) + - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS + - 2x 12-bit DAC, low-power sample and hold + - 2x operational amplifiers with built-in PGA + - 2x ultra-low-power comparators +- 18x communication interfaces + - USB OTG 2.0 full-speed, LPM and BCD + - 2x SAIs (serial audio interface) + - 3x I2C FM+(1 Mbit/s), SMBus/PMBus + - 6x USARTs (ISO 7816, LIN, IrDA, modem) + - 3x SPIs (4x SPIs with the Quad SPI) + - CAN (2.0B Active) and SDMMC interface + - SWPMI single wire protocol master I/F +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| + + +Supported Features +================== + +The Zephyr stm32l475ve_pandora board configuration supports the following hardware features: + ++-----------+------------+----------------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+==============================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+----------------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+----------------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+----------------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------------------------------+ +| I2C | on-chip | I2C-AHT10(Temperature and humidity sensor) | +| | | I2C-ICM2068(light environment sensor) | ++-----------+------------+----------------------------------------------+ +| I2S | on-chip | I2S-ES8388(Audio Decoder) | ++-----------+------------+----------------------------------------------+ +| USB | on-chip | I2S-OTG | ++-----------+------------+----------------------------------------------+ +| SDIO | on-chip | SDIO-AP6181(WIFI) | ++-----------+------------+----------------------------------------------+ +| SPI | on-chip | LCD-TFT | ++-----------+------------+----------------------------------------------+ +| QSPI NOR | on-chip | flash | ++-----------+------------+----------------------------------------------+ +| IR-RX/TX | on-board | Infrared Receiver(38Khz)/Transmitter | ++-----------+------------+----------------------------------------------+ +| STLINK-V2 | on-board | STLINK-V2 Debugger | ++-----------+------------+----------------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: + + ``boards/arm/pandora_stm32l475/pandora_stm32l475_defconfig`` + + +Connections and IOs +=================== + +STM32L475 Pandora Board has 8 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For mode details please refer to `STM32L475 Pandora board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- UART_1_TX : PA9 +- UART_1_RX : PA10 +- LED_R : PE7 +- LED_G : PE8 +- LED_B : PE9 + +System Clock +------------ + +STM32L475 Pandora System Clock could be driven by an internal or external oscillator, +as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz, +driven by 16MHz high speed internal oscillator. + +Serial Port +----------- + +STM32L475 Pandora board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2. +Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +Flashing +======== + +STM32L475 Pandora board includes an ST-LINK/V2-1 embedded debug tool interface. +This interface is supported by the openocd version included in Zephyr SDK. + +Flashing an application to STM32L475 Pandora +-------------------------------------------- + +Connect the STM32L475 Pandora to your host computer using the USB +port, then run a serial host program to connect with your Discovery +board. For example: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Then, build and flash in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32l475ve_pandora + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! arm + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32l475ve_pandora + :maybe-skip-config: + :goals: debug + +.. _STM32L475 Pandora website: + http://www.openedv.com/docs/boards/iot/zdyz_panduola.html + +.. _STM32L475 Pandora board User Manual: + http://www.openedv.com/thread-284556-1-1.html diff --git a/boards/arm/pandora_stm32l475/pandora_stm32l475.dts b/boards/arm/pandora_stm32l475/pandora_stm32l475.dts new file mode 100644 index 00000000000..d2cc14979d4 --- /dev/null +++ b/boards/arm/pandora_stm32l475/pandora_stm32l475.dts @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2017 TsMax + * + * Based on stm32l475_pandora: + * + * Copyright (c) 2017 Tisilicon Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include + +/ { + model = "STM32L475 Pandora Development Board"; + compatible = "st,pandora_stm32l475"; + + aliases { + led0 = &red_led; + sw0 = &joy_up; + }; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + + spi-flash0 = &w25q128jv; + }; + + leds { + compatible = "gpio-leds"; + red_led: led_0 { + gpios = <&gpioe 7 GPIO_ACTIVE_HIGH>; + label = "User LED_R"; + }; + green_led: led_1 { + gpios = <&gpioe 8 GPIO_ACTIVE_HIGH>; + label = "User LED_G"; + }; + blue_led: led_2 { + gpios = <&gpioe 9 GPIO_ACTIVE_HIGH>; + label = "User LED_B"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + joy_up: joystick_up { + label = "joystick up"; + gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + }; + joy_down: joystick_down { + label = "joystick down"; + gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + joy_left: joystick_left { + label = "joystick left"; + gpios = <&gpiod 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + joy_right: joystick_right { + label = "joystick right"; + gpios = <&gpiod 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; +}; + +&quadspi { + pinctrl-0 = <&quadspi_clk_pe10 &quadspi_ncs_pe11 + &quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13 + &quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15>; + pinctrl-names = "default"; + + status = "okay"; + w25q128jv: qspi-nor-flash@0 { + compatible = "st,stm32-qspi-nor"; + reg = <0>; + qspi-max-frequency = <80000000>; + size = <0x8000000>; + jedec-id = [ef 40 18]; + spi-bus-width = <4>; + status = "okay"; + }; +}; + + +&clk_lsi { + status = "okay"; +}; + +&clk_hsi { + status = "okay"; +}; + +&pll { + div-m = <1>; + mul-n = <20>; + div-p = <7>; + div-q = <2>; + div-r = <4>; + clocks = <&clk_hsi>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; + status = "okay"; + + backup_regs { + status = "okay"; + }; +}; diff --git a/boards/arm/pandora_stm32l475/pandora_stm32l475.yaml b/boards/arm/pandora_stm32l475/pandora_stm32l475.yaml new file mode 100644 index 00000000000..d0f6adfdbf8 --- /dev/null +++ b/boards/arm/pandora_stm32l475/pandora_stm32l475.yaml @@ -0,0 +1,13 @@ +identifier: pandora_stm32l475 +name: STM32L475 Pandora +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 128 +flash: 512 +supported: + - gpio + - counter diff --git a/boards/arm/pandora_stm32l475/pandora_stm32l475_defconfig b/boards/arm/pandora_stm32l475/pandora_stm32l475_defconfig new file mode 100644 index 00000000000..6b76862a311 --- /dev/null +++ b/boards/arm/pandora_stm32l475/pandora_stm32l475_defconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32L4X=y +CONFIG_SOC_STM32L475XX=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# enable uart driver +CONFIG_SERIAL=y + +# enable GPIO +CONFIG_GPIO=y + +# Enable Clocks +CONFIG_CLOCK_CONTROL=y + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# enable pin controller +CONFIG_PINCTRL=y diff --git a/boards/arm/pandora_stm32l475/support/openocd.cfg b/boards/arm/pandora_stm32l475/support/openocd.cfg new file mode 100644 index 00000000000..d9d989eb30e --- /dev/null +++ b/boards/arm/pandora_stm32l475/support/openocd.cfg @@ -0,0 +1,25 @@ +# Explicitly for the STM32L475 Pandora board: +# http://www.st.com/web/en/catalog/tools/PF261635 +# but perfectly functional for any other STM32L4 board connected via +# an stlink-v2-1 interface. +# This is for STM32L4 boards that are connected via stlink-v2-1. + +source [find interface/stlink.cfg] + +transport select hla_swd + +source [find target/stm32l4x.cfg] + +reset_config srst_only + + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} diff --git a/dts/arm/st/l4/stm32l475Xe.dtsi b/dts/arm/st/l4/stm32l475Xe.dtsi new file mode 100644 index 00000000000..86442f8b762 --- /dev/null +++ b/dts/arm/st/l4/stm32l475Xe.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2023 Tisilicon Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(128)>; + }; + + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(512)>; + }; + }; + }; +};