diff --git a/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qlj.overlay b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qlj.overlay
new file mode 100644
index 00000000000..7bd2a7bb72c
--- /dev/null
+++ b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qlj.overlay
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Microchip MEC use its 32 KHz based RTOS timer by default.
+ * Allow the test to build by switching to Cortex-M4 SysTick.
+ */
+
+&rtimer {
+	status = "disabled";
+};
+
+&systick {
+	status = "okay";
+};
diff --git a/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qsz.overlay b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qsz.overlay
new file mode 100644
index 00000000000..7bd2a7bb72c
--- /dev/null
+++ b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qsz.overlay
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Microchip MEC use its 32 KHz based RTOS timer by default.
+ * Allow the test to build by switching to Cortex-M4 SysTick.
+ */
+
+&rtimer {
+	status = "disabled";
+};
+
+&systick {
+	status = "okay";
+};
diff --git a/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qlj.overlay b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qlj.overlay
new file mode 100644
index 00000000000..7bd2a7bb72c
--- /dev/null
+++ b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qlj.overlay
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Microchip MEC use its 32 KHz based RTOS timer by default.
+ * Allow the test to build by switching to Cortex-M4 SysTick.
+ */
+
+&rtimer {
+	status = "disabled";
+};
+
+&systick {
+	status = "okay";
+};
diff --git a/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qsz.overlay b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qsz.overlay
new file mode 100644
index 00000000000..7bd2a7bb72c
--- /dev/null
+++ b/tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qsz.overlay
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Microchip MEC use its 32 KHz based RTOS timer by default.
+ * Allow the test to build by switching to Cortex-M4 SysTick.
+ */
+
+&rtimer {
+	status = "disabled";
+};
+
+&systick {
+	status = "okay";
+};