From bf28bbbcecea6ab2a8e3f4ebd2c3f19439b4dfc8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20=C3=85berg?= Date: Fri, 16 Oct 2020 21:00:13 +0200 Subject: [PATCH] soc: LEON3 SPARC V8 Processor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is a generic SOC description applicable to common LEON3 systems. Signed-off-by: Martin Ã…berg --- dts/bindings/vendor-prefixes.txt | 1 + dts/sparc/leon3soc.dtsi | 44 +++++++++++++++++++++++++++++++ soc/sparc/Kconfig | 8 ++++++ soc/sparc/leon3/CMakeLists.txt | 3 +++ soc/sparc/leon3/Kconfig.defconfig | 12 +++++++++ soc/sparc/leon3/Kconfig.soc | 7 +++++ soc/sparc/leon3/idle.c | 24 +++++++++++++++++ soc/sparc/leon3/linker.ld | 34 ++++++++++++++++++++++++ soc/sparc/leon3/soc.h | 10 +++++++ 9 files changed, 143 insertions(+) create mode 100644 dts/sparc/leon3soc.dtsi create mode 100644 soc/sparc/Kconfig create mode 100644 soc/sparc/leon3/CMakeLists.txt create mode 100644 soc/sparc/leon3/Kconfig.defconfig create mode 100644 soc/sparc/leon3/Kconfig.soc create mode 100644 soc/sparc/leon3/idle.c create mode 100644 soc/sparc/leon3/linker.ld create mode 100644 soc/sparc/leon3/soc.h diff --git a/dts/bindings/vendor-prefixes.txt b/dts/bindings/vendor-prefixes.txt index 4a2337698c0..b17b76b4366 100644 --- a/dts/bindings/vendor-prefixes.txt +++ b/dts/bindings/vendor-prefixes.txt @@ -158,6 +158,7 @@ focaltech FocalTech Systems Co.,Ltd friendlyarm Guangzhou FriendlyARM Computer Tech Co., Ltd fsl Freescale Semiconductor fujitsu Fujitsu Ltd. +gaisler Gaisler gateworks Gateworks Corporation gcw Game Consoles Worldwide ge General Electric Company diff --git a/dts/sparc/leon3soc.dtsi b/dts/sparc/leon3soc.dtsi new file mode 100644 index 00000000000..6fd41d146f8 --- /dev/null +++ b/dts/sparc/leon3soc.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2020 Cobham Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "skeleton.dtsi" + +/ { + ram0: memory@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000000>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + interrupt-parent = <&irqmp>; + + irqmp: irqmp0@80000200 { + compatible = "gaisler,irqmp"; + reg = <0x80000200 0x100>; + eirq = <0>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + timer0: gptimer@80000300 { + compatible = "gaisler,gptimer"; + interrupts = <8>; + reg = <0x80000300 0x100>; + }; + + uart0: apbuart@80000100 { + compatible = "gaisler,apbuart"; + interrupts = <2>; + reg = <0x80000100 0x100>; + label = "UART_0"; + status = "disabled"; + }; + }; +}; diff --git a/soc/sparc/Kconfig b/soc/sparc/Kconfig new file mode 100644 index 00000000000..0d975d46c32 --- /dev/null +++ b/soc/sparc/Kconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2019-2020 Cobham Gaisler AB +# SPDX-License-Identifier: Apache-2.0 + +config SPARC_CASA + default y + +config SOC_SPARC_LEON + bool diff --git a/soc/sparc/leon3/CMakeLists.txt b/soc/sparc/leon3/CMakeLists.txt new file mode 100644 index 00000000000..53b77ee8a37 --- /dev/null +++ b/soc/sparc/leon3/CMakeLists.txt @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +zephyr_sources(idle.c) diff --git a/soc/sparc/leon3/Kconfig.defconfig b/soc/sparc/leon3/Kconfig.defconfig new file mode 100644 index 00000000000..52a71b68275 --- /dev/null +++ b/soc/sparc/leon3/Kconfig.defconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2019-2020 Cobham Gaisler AB +# SPDX-License-Identifier: Apache-2.0 + +if SOC_LEON3 + +config SOC + default "leon3" + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 40000000 + +endif diff --git a/soc/sparc/leon3/Kconfig.soc b/soc/sparc/leon3/Kconfig.soc new file mode 100644 index 00000000000..f3e01822092 --- /dev/null +++ b/soc/sparc/leon3/Kconfig.soc @@ -0,0 +1,7 @@ +# Copyright (c) 2019-2020 Cobham Gaisler AB +# SPDX-License-Identifier: Apache-2.0 + +config SOC_LEON3 + bool "A LEON3 SOC which you can configure" + select SPARC + select SOC_SPARC_LEON diff --git a/soc/sparc/leon3/idle.c b/soc/sparc/leon3/idle.c new file mode 100644 index 00000000000..9c08c5f2eb3 --- /dev/null +++ b/soc/sparc/leon3/idle.c @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2019-2020 Cobham Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +static void leon_idle(unsigned int key) +{ + irq_unlock(key); + + __asm__ volatile ("wr %g0, %asr19"); +} + +void arch_cpu_idle(void) +{ + leon_idle(0); +} + +void arch_cpu_atomic_idle(unsigned int key) +{ + leon_idle(key); +} diff --git a/soc/sparc/leon3/linker.ld b/soc/sparc/leon3/linker.ld new file mode 100644 index 00000000000..0c430af2857 --- /dev/null +++ b/soc/sparc/leon3/linker.ld @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2019-2020 Cobham Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Linker command/script file + * + * Linker script for LEON3 + */ + +#include +#include + +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 512M + RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE) + /* refer to include/linker/inlist.ld */ + IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K +} + +REGION_ALIAS("REGION_TEXT", RAM); +REGION_ALIAS("REGION_RODATA", RAM); +REGION_ALIAS("REGION_DATA_VMA", RAM); +REGION_ALIAS("REGION_DATA_LMA", RAM); +REGION_ALIAS("REGION_BSS", RAM); + +#define ROMABLE_REGION RAM +#define RAMABLE_REGION RAM + +#include diff --git a/soc/sparc/leon3/soc.h b/soc/sparc/leon3/soc.h new file mode 100644 index 00000000000..c5676bfbcd1 --- /dev/null +++ b/soc/sparc/leon3/soc.h @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2019-2020 Cobham Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __SOC_H__ +#define __SOC_H__ + +#endif /* __SOC_H__ */