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dts: arm: st: stm32mp2_m33.dtsi: add uart/usart

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Add UART/USART nodes in non-secure context to the device tree for
STM32MP2 SoC.

Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
This commit is contained in:
Youssef Zini 2025-05-20 10:26:21 +02:00 committed by Daniel DeGrasse
parent 03d3075dc8
commit be12fa104f
1 changed files with 81 additions and 0 deletions
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81
dts/arm/st/mp2/stm32mp2_m33.dtsi
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@ -159,6 +159,87 @@
status = "disabled";
};
};
usart1: serial@40330000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40330000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(USART1, STM32_CLK)>;
resets = <&rctl STM32_RESET(USART1, STM32_RST)>;
interrupts = <114 0>;
status = "disabled";
};
usart2: serial@400e0000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x400e0000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(USART2, STM32_CLK)>;
resets = <&rctl STM32_RESET(USART2, STM32_RST)>;
interrupts = <115 0>;
status = "disabled";
};
usart3: serial@400f0000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x400f0000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(USART3, STM32_CLK)>;
resets = <&rctl STM32_RESET(USART3, STM32_RST)>;
interrupts = <116 0>;
status = "disabled";
};
uart4: serial@40100000 {
compatible = "st,stm32-uart";
reg = <0x40100000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(UART4, STM32_CLK)>;
resets = <&rctl STM32_RESET(UART4, STM32_RST)>;
interrupts = <126 0>;
status = "disabled";
};
uart5: serial@40110000 {
compatible = "st,stm32-uart";
reg = <0x40110000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(UART5, STM32_CLK)>;
resets = <&rctl STM32_RESET(UART5, STM32_RST)>;
interrupts = <127 0>;
status = "disabled";
};
usart6: serial@40220000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40220000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(USART6, STM32_CLK)>;
resets = <&rctl STM32_RESET(USART6, STM32_RST)>;
interrupts = <136 0>;
status = "disabled";
};
uart7: serial@40370000 {
compatible = "st,stm32-uart";
reg = <0x40370000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(UART7, STM32_CLK)>;
resets = <&rctl STM32_RESET(UART7, STM32_RST)>;
interrupts = <148 0>;
status = "disabled";
};
uart8: serial@40380000 {
compatible = "st,stm32-uart";
reg = <0x40380000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(UART8, STM32_CLK)>;
resets = <&rctl STM32_RESET(UART8, STM32_RST)>;
interrupts = <149 0>;
status = "disabled";
};
uart9: serial@402c0000 {
compatible = "st,stm32-uart";
reg = <0x402c0000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(UART9, STM32_CLK)>;
resets = <&rctl STM32_RESET(UART9, STM32_RST)>;
interrupts = <150 0>;
status = "disabled";
};
};
};