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QMSI/uart: Use IOAPIC_EDGE instead of IOAPIC_LEVEL

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Use IOAPIC_EDGE instead of IOAPIC_LEVEL to fix missing interrupts.
During tests it was found that using IOAPIC_LEVEL interrupts for UART at
some points are lost.
Proposed by Calando, Antoine <antoine.calando@intel.com>

Change-Id: I18b20217c4d73fdeaa424bf59d00f6be1ec6ef1b
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This commit is contained in:
Andrei Emeltchenko 2016-07-08 12:23:41 +03:00 committed by Inaky Perez-Gonzalez
parent dd2273146c
commit bdb62b8934
3 changed files with 7 additions and 2 deletions
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2
arch/x86/soc/quark_se/soc.h
View File

@ -61,6 +61,8 @@
*/
#define PINMUX_BASE_ADDR 0xb0800900
#define UART_IRQ_FLAGS (IOAPIC_EDGE | IOAPIC_HIGH)
#endif /* _ASMLANGUAGE */
#endif /* __SOC_H_ */

5
drivers/serial/uart_qmsi.c
View File

@ -24,6 +24,7 @@
#include "qm_uart.h"
#include "qm_isr.h"
#include "clk.h"
#include "soc.h"
#include "qm_soc_regs.h"
#define IIR_IID_NO_INTERRUPT_PENDING 0x01
@ -293,7 +294,7 @@ static void irq_config_func_0(struct device *dev)
{
IRQ_CONNECT(QM_IRQ_UART_0, CONFIG_UART_QMSI_0_IRQ_PRI,
uart_qmsi_isr, DEVICE_GET(uart_0),
(IOAPIC_LEVEL | IOAPIC_HIGH));
UART_IRQ_FLAGS);
irq_enable(QM_IRQ_UART_0);
QM_SCSS_INT->int_uart_0_mask &= ~BIT(0);
}
@ -304,7 +305,7 @@ static void irq_config_func_1(struct device *dev)
{
IRQ_CONNECT(QM_IRQ_UART_1, CONFIG_UART_QMSI_1_IRQ_PRI,
uart_qmsi_isr, DEVICE_GET(uart_1),
(IOAPIC_LEVEL | IOAPIC_HIGH));
UART_IRQ_FLAGS);
irq_enable(QM_IRQ_UART_1);
QM_SCSS_INT->int_uart_1_mask &= ~BIT(0);
}

2
include/misc/util.h
View File

@ -98,7 +98,9 @@ static inline int64_t arithmetic_shift_right(int64_t value, uint8_t shift)
#define KHZ(x) ((x) * 1000)
#define MHZ(x) (KHZ(x) * 1000)
#ifndef BIT
#define BIT(n) (1UL << (n))
#endif
#define BIT_MASK(n) (BIT(n) - 1)