diff --git a/samples/drivers/i2s/output/boards/ek_ra4l1.conf b/samples/drivers/i2s/output/boards/ek_ra4l1.conf
new file mode 100644
index 00000000000..7f81a35b585
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra4l1.conf
@@ -0,0 +1,4 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_I2S_INIT_PRIORITY=52
diff --git a/samples/drivers/i2s/output/boards/ek_ra4l1.overlay b/samples/drivers/i2s/output/boards/ek_ra4l1.overlay
new file mode 100644
index 00000000000..368494deedf
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra4l1.overlay
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pwm/pwm.h>
+
+/ {
+	aliases {
+		i2s-tx = &i2s0;
+	};
+};
+
+&pinctrl {
+	ssie0_default: ssie0_default {
+		group1 {
+			/* SSI_BCK SSI_LRCK SSI_TX SSI_RX */
+			psels = <RA_PSEL(RA_PSEL_SSIE, 4, 3)>,
+					<RA_PSEL(RA_PSEL_SSIE, 4, 4)>,
+					<RA_PSEL(RA_PSEL_SSIE, 6, 8)>,
+					<RA_PSEL(RA_PSEL_SSIE, 1, 15)>;
+			drive-strength = "high";
+		};
+	};
+
+	pwm2_default: pwm2_default {
+		group1 {
+			/* GTIOC2A */
+			psels = <RA_PSEL(RA_PSEL_GPT1, 4, 7)>;
+		};
+	};
+};
+
+&i2s0 {
+	pinctrl-0 = <&ssie0_default>;
+	pinctrl-names = "default";
+	interrupts = <61 12>, <62 12>, <63 12>;
+	interrupt-names = "ssi_txi", "ssi_rxi", "ssi_if";
+	status = "okay";
+	clocks = <&pclkb MSTPC 8>, <&ssi_internal_clock 0>;
+	clock-names = "pclk", "audio-clock";
+};
+
+&pwm2 {
+	pinctrl-0 = <&pwm2_default>;
+	pinctrl-names = "default";
+	interrupts = <59 12>, <60 12>;
+	interrupt-names = "gtioca", "overflow";
+	status = "okay";
+
+	ssi_internal_clock: pwmclock {
+		status = "okay";
+		compatible = "pwm-clock";
+		#clock-cells = <1>;
+		pwms = <&pwm2 0 PWM_HZ(2822400) PWM_POLARITY_NORMAL>;
+	};
+};
diff --git a/samples/drivers/i2s/output/boards/ek_ra8d1.conf b/samples/drivers/i2s/output/boards/ek_ra8d1.conf
new file mode 100644
index 00000000000..7f81a35b585
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra8d1.conf
@@ -0,0 +1,4 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_I2S_INIT_PRIORITY=52
diff --git a/samples/drivers/i2s/output/boards/ek_ra8d1.overlay b/samples/drivers/i2s/output/boards/ek_ra8d1.overlay
new file mode 100644
index 00000000000..e7290721a80
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra8d1.overlay
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pwm/pwm.h>
+
+/ {
+	aliases {
+		i2s-tx = &i2s1;
+	};
+};
+
+&pinctrl {
+	ssie1_default: ssie1_default {
+		group1 {
+			/* SSI_BCK SSI_LRCK SSI_DATA */
+			psels = <RA_PSEL(RA_PSEL_SSIE, 7, 2)>,
+				<RA_PSEL(RA_PSEL_SSIE, 7, 1)>,
+				<RA_PSEL(RA_PSEL_SSIE, 7, 0)>;
+			drive-strength = "high";
+		};
+	};
+
+	pwm2_default: pwm2_default {
+		group1 {
+			/* GTIOC2A */
+			psels = <RA_PSEL(RA_PSEL_GPT1, 1, 3)>;
+		};
+	};
+};
+
+&i2s1 {
+	pinctrl-0 = <&ssie1_default>;
+	pinctrl-names = "default";
+	interrupts = <94 12>, <95 12>;
+	interrupt-names = "ssi_rt", "ssi_if";
+	status = "okay";
+	clocks = <&pclkb MSTPC 7>, <&ssi_internal_clock 0>;
+	clock-names = "pclk", "audio-clock";
+};
+
+&pwm2 {
+	pinctrl-0 = <&pwm2_default>;
+	pinctrl-names = "default";
+	interrupts = <92 12>, <93 12>;
+	interrupt-names = "gtioca", "overflow";
+	status = "okay";
+
+	ssi_internal_clock: pwmclock {
+		status = "okay";
+		compatible = "pwm-clock";
+		#clock-cells = <1>;
+		pwms = <&pwm2 0 PWM_HZ(2822400) PWM_POLARITY_NORMAL>;
+	};
+};
diff --git a/samples/drivers/i2s/output/boards/ek_ra8m1.conf b/samples/drivers/i2s/output/boards/ek_ra8m1.conf
new file mode 100644
index 00000000000..7f81a35b585
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra8m1.conf
@@ -0,0 +1,4 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_I2S_INIT_PRIORITY=52
diff --git a/samples/drivers/i2s/output/boards/ek_ra8m1.overlay b/samples/drivers/i2s/output/boards/ek_ra8m1.overlay
new file mode 100644
index 00000000000..bd452b637d1
--- /dev/null
+++ b/samples/drivers/i2s/output/boards/ek_ra8m1.overlay
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pwm/pwm.h>
+
+/ {
+	aliases {
+		i2s-tx = &i2s1;
+	};
+};
+
+&pinctrl {
+	ssie1_default: ssie1_default {
+		group1 {
+			/* SSI_BCK SSI_LRCK SSI_DATA */
+			psels = <RA_PSEL(RA_PSEL_SSIE, 2, 4)>,
+				<RA_PSEL(RA_PSEL_SSIE, 2, 5)>,
+				<RA_PSEL(RA_PSEL_SSIE, 2, 6)>;
+			drive-strength = "high";
+		};
+	};
+
+	pwm2_default: pwm2_default {
+		group1 {
+			/* GTIOC2A */
+			psels = <RA_PSEL(RA_PSEL_GPT1, 7, 13)>;
+		};
+	};
+};
+
+&i2s1 {
+	pinctrl-0 = <&ssie1_default>;
+	pinctrl-names = "default";
+	interrupts = <94 12>, <95 12>;
+	interrupt-names = "ssi_rt", "ssi_if";
+	status = "okay";
+	clocks = <&pclkb MSTPC 7>, <&ssi_internal_clock 0>;
+	clock-names = "pclk", "audio-clock";
+};
+
+&pwm2 {
+	pinctrl-0 = <&pwm2_default>;
+	pinctrl-names = "default";
+	interrupts = <92 12>, <93 12>;
+	interrupt-names = "gtioca", "overflow";
+	status = "okay";
+
+	ssi_internal_clock: pwmclock {
+		status = "okay";
+		compatible = "pwm-clock";
+		#clock-cells = <1>;
+		pwms = <&pwm2 0 PWM_HZ(2822400) PWM_POLARITY_NORMAL>;
+	};
+};