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boards: frdm_mcxa153: add uart support

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- add uart support
- enable the uart_async_api test example

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
This commit is contained in:
Neil Chen 2025-04-16 14:11:35 +08:00 committed by Benjamin Cabé
parent 4edc003b9c
commit bd22a4a394
5 changed files with 77 additions and 0 deletions
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9
boards/nxp/frdm_mcxa153/board.c
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@ -66,6 +66,10 @@ void board_early_init_hook(void)
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(edma0))
RESET_ReleasePeripheralReset(kDMA_RST_SHIFT_RSTn);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0))
RESET_ReleasePeripheralReset(kGPIO0_RST_SHIFT_RSTn);
CLOCK_EnableClock(kCLOCK_GateGPIO0);
@ -96,6 +100,11 @@ void board_early_init_hook(void)
CLOCK_AttachClk(kFRO12M_to_LPUART1);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpuart2))
CLOCK_SetClockDiv(kCLOCK_DivLPUART2, 1u);
CLOCK_AttachClk(kFRO12M_to_LPUART2);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(porta))
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
#endif

10
boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi
View File

@ -16,4 +16,14 @@
input-enable;
};
};
pinmux_lpuart2: pinmux_lpuart2 {
group0 {
pinmux = <LPUART2_RXD_P3_14>,
<LPUART2_TXD_P3_15>;
drive-strength = "low";
slew-rate = "fast";
input-enable;
};
};
};

1
boards/nxp/frdm_mcxa153/frdm_mcxa153.yaml
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@ -14,6 +14,7 @@ toolchain:
- zephyr
- gnuarmemb
supported:
- dma
- gpio
- uart
vendor: nxp

38
dts/arm/nxp/nxp_mcxa153.dtsi
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@ -29,6 +29,19 @@
};
soc {
edma0: dma-controller@40080000 {
#dma-cells = <2>;
compatible = "nxp,mcux-edma";
nxp,version = <4>;
dma-channels = <4>;
dma-requests = <66>;
reg = <0x40080000 0x1000>;
interrupts = <2 0>, <3 0>, <4 0>, <5 0>;
no-error-irq;
status = "disabled";
};
fmu: flash-controller@40095000 {
compatible = "nxp,msf1";
reg = <0x40095000 0x1000>;
@ -91,6 +104,31 @@
reg = <0x4009f000 0x1000>;
interrupts = <31 0>;
clocks = <&syscon MCUX_LPUART0_CLK>;
/* DMA channels 0 and 1, muxed to LPUART0 RX and TX */
dmas = <&edma0 0 21>, <&edma0 1 22>;
dma-names = "rx", "tx";
};
lpuart1: lpuart@400a0000 {
compatible = "nxp,lpuart";
status = "disabled";
reg = <0x400a0000 0x1000>;
interrupts = <32 0>;
clocks = <&syscon MCUX_LPUART1_CLK>;
/* DMA channels 2 and 3, muxed to LPUART1 RX and TX */
dmas = <&edma0 2 23>, <&edma0 3 24>;
dma-names = "rx", "tx";
};
lpuart2: lpuart@400a1000 {
compatible = "nxp,lpuart";
status = "disabled";
reg = <0x400a1000 0x1000>;
interrupts = <33 0>;
clocks = <&syscon MCUX_LPUART2_CLK>;
/* DMA channels 2 and 3, muxed to LPUART2 RX and TX */
dmas = <&edma0 2 25>, <&edma0 3 26>;
dma-names = "rx", "tx";
};
porta: pinmux@400bc000 {

19
tests/drivers/uart/uart_async_api/boards/frdm_mcxa153.overlay Normal file
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@ -0,0 +1,19 @@
/*
* Copyright 2025 NXP
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Short J5.3(P3_14) and J5.4(P3_15) to loopback LPUART2 RX/TX for this test
* or test lpuart2 with "nxp,loopback"
*/
dut: &lpuart2 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_lpuart2>;
pinctrl-names = "default";
};
&edma0 {
status = "okay";
};