From bc2e157cbad2995604acd08454f09997d351ffaf Mon Sep 17 00:00:00 2001 From: Greter Raffael Date: Thu, 21 Dec 2023 12:41:59 +0000 Subject: [PATCH] riscv: irq: Correct CLIC_INTATTR_TRIG_Msk The trig field of clicintattr is indeed in bits 2:1. However, the mask `CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield `INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally. Signed-off-by: Greter Raffael --- drivers/interrupt_controller/intc_nuclei_eclic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/interrupt_controller/intc_nuclei_eclic.c b/drivers/interrupt_controller/intc_nuclei_eclic.c index 7c112c1a63f..fbef601d171 100644 --- a/drivers/interrupt_controller/intc_nuclei_eclic.c +++ b/drivers/interrupt_controller/intc_nuclei_eclic.c @@ -88,10 +88,8 @@ struct CLICCTRL { /** ECLIC Mode mask for MTVT CSR Register */ #define ECLIC_MODE_MTVEC_Msk 3U -/** CLIC INTATTR: TRIG Position */ -#define CLIC_INTATTR_TRIG_Pos 1U /** CLIC INTATTR: TRIG Mask */ -#define CLIC_INTATTR_TRIG_Msk (0x3UL << CLIC_INTATTR_TRIG_Pos) +#define CLIC_INTATTR_TRIG_Msk 0x3U #define ECLIC_CFG (*((volatile union CLICCFG *)(DT_REG_ADDR_BY_IDX(DT_NODELABEL(eclic), 0)))) #define ECLIC_INFO (*((volatile union CLICINFO *)(DT_REG_ADDR_BY_IDX(DT_NODELABEL(eclic), 1))))