drivers: adc: Add support for Apollo510 ADC

This commit adds support for Apollo510 SoC in ambiq adc driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
This commit is contained in:
Hao Luo 2025-02-12 11:50:31 +08:00 committed by Benjamin Cabé
parent 3c7e43f4e2
commit ba52a93ac9
7 changed files with 98 additions and 7 deletions

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@ -24,6 +24,13 @@
};
};
adc0_default: adc0_default{
group1 {
pinmux = <ADCSE4_P15>, <ADCSE7_P12>;
drive-strength = "0.1";
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;

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@ -89,6 +89,12 @@
pinctrl-names = "default";
};
&adc0 {
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
status = "disabled";
};
&counter0 {
status = "disabled";
};

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@ -9,6 +9,7 @@ toolchain:
- gnuarmemb
supported:
- uart
- adc
- watchdog
- counter
- gpio

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@ -52,7 +52,7 @@ static int adc_ambiq_set_resolution(am_hal_adc_slot_prec_e *prec, uint8_t adc_re
case 12:
*prec = AM_HAL_ADC_SLOT_12BIT;
break;
#if !defined(CONFIG_SOC_SERIES_APOLLO4X)
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
case 14:
*prec = AM_HAL_ADC_SLOT_14BIT;
break;
@ -80,7 +80,7 @@ static int adc_ambiq_slot_config(const struct device *dev, const struct adc_sequ
ADCSlotConfig.eChannel = channel;
ADCSlotConfig.bWindowCompare = false;
ADCSlotConfig.bEnabled = true;
#if defined(CONFIG_SOC_SERIES_APOLLO4X)
#if !defined(CONFIG_SOC_SERIES_APOLLO3X)
ADCSlotConfig.ui32TrkCyc = AM_HAL_ADC_MIN_TRKCYC;
#endif
if (AM_HAL_STATUS_SUCCESS !=
@ -101,8 +101,6 @@ static void adc_ambiq_isr(const struct device *dev)
/* Read the interrupt status. */
am_hal_adc_interrupt_status(data->adcHandle, &ui32IntMask, true);
/* Clear the ADC interrupt.*/
am_hal_adc_interrupt_clear(data->adcHandle, ui32IntMask);
/*
* If we got a conversion completion interrupt (which should be our only
@ -119,6 +117,8 @@ static void adc_ambiq_isr(const struct device *dev)
am_hal_adc_disable(data->adcHandle);
adc_context_on_sampling_done(&data->ctx, dev);
}
/* Clear the ADC interrupt.*/
am_hal_adc_interrupt_clear(data->adcHandle, ui32IntMask);
}
static int adc_ambiq_check_buffer_size(const struct adc_sequence *sequence, uint8_t active_channels)
@ -280,9 +280,9 @@ static int adc_ambiq_init(const struct device *dev)
/* Initialize the ADC and get the handle*/
if (AM_HAL_STATUS_SUCCESS !=
am_hal_adc_initialize((cfg->base - ADC_BASE) / (cfg->size * 4), &data->adcHandle)) {
am_hal_adc_initialize(0, &data->adcHandle)) {
ret = -ENODEV;
LOG_ERR("Faile to initialize ADC, code:%d", ret);
LOG_ERR("Failed to initialize ADC, code:%d", ret);
return ret;
}
@ -292,7 +292,7 @@ static int adc_ambiq_init(const struct device *dev)
/* Set up the ADC configuration parameters. These settings are reasonable
* for accurate measurements at a low sample rate.
*/
#if !defined(CONFIG_SOC_SERIES_APOLLO4X)
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
ADCConfig.eClock = AM_HAL_ADC_CLKSEL_HFRC;
ADCConfig.eReference = AM_HAL_ADC_REFSEL_INT_1P5;
#else

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@ -549,6 +549,17 @@
status = "disabled";
};
adc0: adc@ADC_BASE_NAME {
compatible = "ambiq,adc";
reg = <ADC_REG_BASE ADC_REG_SIZE>;
interrupts = <19 0>;
interrupt-names = "ADC";
channel-count = <10>;
internal-vref-mv = <1190>;
status = "disabled";
#io-channel-cells = <1>;
};
pinctrl: pin-controller@GPIO_BASE_NAME {
compatible = "ambiq,apollo5-pinctrl";
reg = <GPIO_REG_BASE GPIO_REG_SIZE>;

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@ -0,0 +1,34 @@
/*
* Copyright (c) 2025 Ambiq Micro Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
zephyr,user {
io-channels = <&adc0 4>, <&adc0 7>;
};
};
&adc0 {
status = "okay";
interrupt-parent = <&nvic>;
interrupts = <19 0>;
#address-cells = <1>;
#size-cells = <0>;
channel@4 {
reg = <4>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@7 {
reg = <7>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
};

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@ -0,0 +1,32 @@
/*
* Copyright (c) 2025 Ambiq Micro Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
zephyr,user {
io-channels = <&adc0 4>, <&adc0 7>;
};
};
&adc0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
channel@4 {
reg = <4>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@7 {
reg = <7>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
};