diff --git a/boards/arm/efr32_slwstk6061a/board.cmake b/boards/arm/efr32_slwstk6061a/board.cmake new file mode 100644 index 00000000000..cd5addc2d73 --- /dev/null +++ b/boards/arm/efr32_slwstk6061a/board.cmake @@ -0,0 +1,2 @@ +board_runner_args(openocd) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/efr32_slwstk6061a/doc/efr32_slwstk6061a.rst b/boards/arm/efr32_slwstk6061a/doc/efr32_slwstk6061a.rst index d548861c692..c4e746ab00b 100644 --- a/boards/arm/efr32_slwstk6061a/doc/efr32_slwstk6061a.rst +++ b/boards/arm/efr32_slwstk6061a/doc/efr32_slwstk6061a.rst @@ -145,6 +145,17 @@ Connect the EFR32-SLWSTK6061A to your host computer using the USB port and you should see a USB Serial Port. Use `J-Link`_ or Silicon Labs Simplicity Studio to flash the generated zephyr.bin. +`OpenOCD`_ included in the Zephyr SDK v0.9.3 is too old and does not support the +EFR32FG1P chip, neither does the latest OpenOCD 0.10.0 release. You will need to +compile the newest version of the source code and install the tool yourself. +Modify the following command if you install OpenOCD to a location different than +the default /usr/local/. + +.. code-block:: console + + cmake -GNinja -DBOARD=efr32_slwstk6061a -DOPENOCD=/usr/local/bin/openocd -DOPENOCD_DEFAULT_PATH=/usr/local/share/openocd/scripts .. + ninja flash + Open a serial terminal (minicom, putty, etc.) with the following settings: - Speed: 115200 @@ -186,3 +197,6 @@ the following message: .. _J-Link-Downloads: https://www.segger.com/downloads/jlink + +.. _OpenOCD: + http://openocd.org/ diff --git a/boards/arm/efr32_slwstk6061a/support/openocd.cfg b/boards/arm/efr32_slwstk6061a/support/openocd.cfg new file mode 100644 index 00000000000..9cb8a1e10a6 --- /dev/null +++ b/boards/arm/efr32_slwstk6061a/support/openocd.cfg @@ -0,0 +1,25 @@ +if {[info exists env(OPENOCD_INTERFACE)]} { + set INTERFACE $env(OPENOCD_INTERFACE) +} else { + # By default connect over Debug USB port using the J-Link interface + set INTERFACE "jlink" +} + +source [find interface/$INTERFACE.cfg] + +transport select swd + +set CHIPNAME efr32fg1p + +source [find target/efm32.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +}