diff --git a/dts/riscv/neorv32.dtsi b/dts/riscv/neorv32.dtsi
index 919eb7131a4..b5670bcfbf6 100644
--- a/dts/riscv/neorv32.dtsi
+++ b/dts/riscv/neorv32.dtsi
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include <skeleton.dtsi>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	cpus {
@@ -67,6 +68,44 @@
 			label = "UART_0";
 		};
 
+		gpio: gpio {
+			compatible = "simple-bus";
+			gpio-map-mask = <0xffffffe0 0xffffffc0>;
+			gpio-map-pass-thru = <0x1f 0x3f>;
+			gpio-map = <
+				0x00 0x0 &gpio_lo 0x0 0x0
+				0x20 0x0 &gpio_hi 0x0 0x0
+			>;
+			#gpio-cells = <2>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			gpio_lo: gpio@ffffffc0 {
+				compatible = "neorv32-gpio";
+				status = "disabled";
+				reg = <0xffffffc0 4 0xffffffc8 4>;
+				reg-names = "input", "output";
+				gpio-controller;
+				ngpios = <32>;
+				syscon = <&sysinfo>;
+				label = "GPIO_LO";
+				#gpio-cells = <2>;
+			};
+
+			gpio_hi: gpio@ffffffc4 {
+				compatible = "neorv32-gpio";
+				status = "disabled";
+				reg = <0xffffffc4 4 0xffffffcc 4>;
+				reg-names = "input", "output";
+				gpio-controller;
+				ngpios = <32>;
+				syscon = <&sysinfo>;
+				label = "GPIO_HI";
+				#gpio-cells = <2>;
+			};
+		};
+
 		uart1: serial@ffffffd0 {
 			compatible = "neorv32-uart";
 			status = "disabled";