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dts: bindings: neorv32: use vendor prefix

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Use vendor prefix "neorv32" for all peripherals provided by the NEORV32
RISV-V Processor project.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit is contained in:
Henrik Brix Andersen 2025-03-10 15:55:46 +01:00 committed by Benjamin Cabé
parent 70c89811be
commit b4d5fc5cd2
8 changed files with 14 additions and 13 deletions
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2
doc/releases/release-notes-3.2.rst
View File

@ -1112,7 +1112,7 @@ Devicetree
* :dtcompatible:`microchip,xec-espi`
* :dtcompatible:`microchip,xec-i2c`
* :dtcompatible:`microchip,xec-qmspi`
* :dtcompatible:`neorv32-machine-timer`
* :dtcompatible:`neorv32,machine-timer`
* :dtcompatible:`nordic,nrf-ieee802154`
* :dtcompatible:`nuclei,systimer`
* :dtcompatible:`nuvoton,npcx-leakage-io`

2
doc/releases/release-notes-3.5.rst
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@ -1022,7 +1022,7 @@ Bindings
* The ``riscv,isa`` property used by RISC-V CPU bindings no longer has an
``enum`` value.
* :dtcompatible:`neorv32-cpu`:
* :dtcompatible:`neorv32,cpu`:
* new property: ``mmu-type``
* new property: ``riscv,isa``

2
dts/bindings/cpu/neorv32-cpu.yaml → dts/bindings/cpu/neorv32,cpu.yaml
View File

@ -3,6 +3,6 @@
description: NEORV32 RISC-V CPU
compatible: "neorv32-cpu"
compatible: "neorv32,cpu"
include: riscv,cpus.yaml

2
dts/bindings/gpio/neorv32-gpio.yaml → dts/bindings/gpio/neorv32,gpio.yaml
View File

@ -1,6 +1,6 @@
description: NEORV32 GPIO
compatible: "neorv32-gpio"
compatible: "neorv32,gpio"
include: [gpio-controller.yaml, base.yaml]

2
dts/bindings/rng/neorv32-trng.yaml → dts/bindings/rng/neorv32,trng.yaml
View File

@ -1,6 +1,6 @@
description: NEORV32 True Random Number Generator (TRNG)
compatible: "neorv32-trng"
compatible: "neorv32,trng"
include: base.yaml

2
dts/bindings/serial/neorv32-uart.yaml → dts/bindings/serial/neorv32,uart.yaml
View File

@ -1,6 +1,6 @@
description: NEORV32 UART
compatible: "neorv32-uart"
compatible: "neorv32,uart"
include: uart-controller.yaml

1
dts/bindings/vendor-prefixes.txt
View File

@ -452,6 +452,7 @@ myir MYIR Tech Limited
national National Semiconductor
nec NEC LCD Technologies, Ltd.
neonode Neonode Inc.
neorv32 NEORV32 RISC-V Processor
netgear NETGEAR
netlogic Broadcom Corporation (formerly NetLogic Microsystems)
netron-dy Netron DY

14
dts/riscv/neorv32.dtsi
View File

@ -19,7 +19,7 @@
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "neorv32-cpu", "riscv";
compatible = "neorv32,cpu", "riscv";
reg = <0>;
device_type = "cpu";
@ -74,13 +74,13 @@
};
bootrom: rom@ffe00000 {
compatible = "neorv32-bootrom", "mmio-sram";
compatible = "neorv32,bootrom", "mmio-sram";
status = "disabled";
reg = <0xffe00000 0x10000>;
};
clint: clint@fff40000 {
compatible = "neorv32-clint", "sifive,clint0";
compatible = "neorv32,clint", "sifive,clint0";
status = "disabled";
reg = <0xfff40000 0x10000>;
interrupts-extended = <&intc 3>;
@ -95,7 +95,7 @@
};
uart0: serial@fff50000 {
compatible = "neorv32-uart";
compatible = "neorv32,uart";
status = "disabled";
reg = <0xfff50000 0x10000>;
interrupts = <2>, <3>;
@ -104,7 +104,7 @@
};
uart1: serial@fff60000 {
compatible = "neorv32-uart";
compatible = "neorv32,uart";
status = "disabled";
reg = <0xfff60000 0x10000>;
interrupts = <4>, <5>;
@ -113,14 +113,14 @@
};
trng: rng@fffa0000 {
compatible = "neorv32-trng";
compatible = "neorv32,trng";
status = "disabled";
reg = <0xfffa0000 0x10000>;
syscon = <&sysinfo>;
};
gpio: gpio@fffc0000 {
compatible = "neorv32-gpio";
compatible = "neorv32,gpio";
status = "disabled";
reg = <0xfffc0000 0x10000>;
syscon = <&sysinfo>;