From ae4f68c16de2015b321323b46fbbaaeeaf4db8ef Mon Sep 17 00:00:00 2001 From: Josh Hansen Date: Thu, 14 Oct 2021 09:46:33 -0400 Subject: [PATCH] drivers: dma: stm32 Fix for STM32F1 SoCs Not all STM32 parts have at least 5 DMA interrupt vectors for DMA2. In particular, some STM32F1 XL-density devices only have 4 DMA2 interrupt vectors, with Channels 4 and 5 sharing the same vector. Added #if DT_INST_IRQ_HAS_IDX(1, 4) to prevent compiler errors on these SoCs. Signed-off-by: Josh Hansen --- drivers/dma/dma_stm32.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/dma/dma_stm32.c b/drivers/dma/dma_stm32.c index f19ccdde2a4..c2a6aff1e3f 100644 --- a/drivers/dma/dma_stm32.c +++ b/drivers/dma/dma_stm32.c @@ -773,6 +773,7 @@ DMA_STM32_DEFINE_IRQ_HANDLER(1, 0); DMA_STM32_DEFINE_IRQ_HANDLER(1, 1); DMA_STM32_DEFINE_IRQ_HANDLER(1, 2); DMA_STM32_DEFINE_IRQ_HANDLER(1, 3); +#if DT_INST_IRQ_HAS_IDX(1, 4) DMA_STM32_DEFINE_IRQ_HANDLER(1, 4); #if DT_INST_IRQ_HAS_IDX(1, 5) DMA_STM32_DEFINE_IRQ_HANDLER(1, 5); @@ -780,6 +781,7 @@ DMA_STM32_DEFINE_IRQ_HANDLER(1, 5); DMA_STM32_DEFINE_IRQ_HANDLER(1, 6); #if DT_INST_IRQ_HAS_IDX(1, 7) DMA_STM32_DEFINE_IRQ_HANDLER(1, 7); +#endif /* DT_INST_IRQ_HAS_IDX(1, 4) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 5) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 6) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 7) */ @@ -793,6 +795,7 @@ static void dma_stm32_config_irq_1(const struct device *dev) DMA_STM32_IRQ_CONNECT(1, 1); DMA_STM32_IRQ_CONNECT(1, 2); DMA_STM32_IRQ_CONNECT(1, 3); +#if DT_INST_IRQ_HAS_IDX(1, 4) DMA_STM32_IRQ_CONNECT(1, 4); #if DT_INST_IRQ_HAS_IDX(1, 5) DMA_STM32_IRQ_CONNECT(1, 5); @@ -800,6 +803,7 @@ static void dma_stm32_config_irq_1(const struct device *dev) DMA_STM32_IRQ_CONNECT(1, 6); #if DT_INST_IRQ_HAS_IDX(1, 7) DMA_STM32_IRQ_CONNECT(1, 7); +#endif /* DT_INST_IRQ_HAS_IDX(1, 4) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 5) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 6) */ #endif /* DT_INST_IRQ_HAS_IDX(1, 7) */