diff --git a/arch/xtensa/core/CMakeLists.txt b/arch/xtensa/core/CMakeLists.txt index 5ec158871dd..9e85b2fffdc 100644 --- a/arch/xtensa/core/CMakeLists.txt +++ b/arch/xtensa/core/CMakeLists.txt @@ -25,6 +25,7 @@ zephyr_library_sources_ifdef(CONFIG_XTENSA_MMU ptables.c mmu.c) zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S) zephyr_library_sources_ifdef(CONFIG_XTENSA_SYSCALL_USE_HELPER syscall_helper.c) zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c) +zephyr_library_sources_ifdef(CONFIG_SMP smp.c) zephyr_library_sources_ifdef( CONFIG_KERNEL_VM_USE_CUSTOM_MEM_RANGE_CHECK diff --git a/arch/xtensa/core/smp.c b/arch/xtensa/core/smp.c new file mode 100644 index 00000000000..ffd08ab805c --- /dev/null +++ b/arch/xtensa/core/smp.c @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2023 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#ifdef CONFIG_XTENSA_MORE_SPIN_RELAX_NOPS +/* Some compilers might "optimize out" (i.e. remove) continuous NOPs. + * So force no optimization to avoid that. + */ +__no_optimization +void arch_spin_relax(void) +{ +#define NOP1(_, __) __asm__ volatile("nop.n;"); + LISTIFY(CONFIG_XTENSA_NUM_SPIN_RELAX_NOPS, NOP1, (;)) +#undef NOP1 +} +#endif /* CONFIG_XTENSA_MORE_SPIN_RELAX_NOPS */ diff --git a/arch/xtensa/core/xtensa_asm2.c b/arch/xtensa/core/xtensa_asm2.c index d77302b731f..1b6089820c1 100644 --- a/arch/xtensa/core/xtensa_asm2.c +++ b/arch/xtensa/core/xtensa_asm2.c @@ -529,19 +529,6 @@ int z_xtensa_irq_is_enabled(unsigned int irq) return (ie & (1 << irq)) != 0U; } -#ifdef CONFIG_XTENSA_MORE_SPIN_RELAX_NOPS -/* Some compilers might "optimize out" (i.e. remove) continuous NOPs. - * So force no optimization to avoid that. - */ -__no_optimization -void arch_spin_relax(void) -{ -#define NOP1(_, __) __asm__ volatile("nop.n;"); - LISTIFY(CONFIG_XTENSA_NUM_SPIN_RELAX_NOPS, NOP1, (;)) -#undef NOP1 -} -#endif /* CONFIG_XTENSA_MORE_SPIN_RELAX_NOPS */ - #ifdef CONFIG_USERSPACE FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, void *p1, void *p2, void *p3)