From aa253d9ab124090281b46c76efe3adaa7c5287c0 Mon Sep 17 00:00:00 2001 From: Andrey Borisovich Date: Tue, 5 Jul 2022 01:29:41 +0200 Subject: [PATCH] soc: intel_adsp: reading HP SRAM banks count for ACE1X from Devicetree Replaced hardcoded for intel_adsp_ace15_mtpm board HP_MEMORY_BANKS value used in SOF code with generic approach - using PLATFORM_HPSRAM_EBB_COUNT read from Devicetree. Signed-off-by: Andrey Borisovich --- samples/subsys/audio/sof/boards/intel_adsp_ace15_mtpm.conf | 1 - soc/xtensa/intel_adsp/common/sram.c | 6 +++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/samples/subsys/audio/sof/boards/intel_adsp_ace15_mtpm.conf b/samples/subsys/audio/sof/boards/intel_adsp_ace15_mtpm.conf index d666174faa9..f23a6244c34 100644 --- a/samples/subsys/audio/sof/boards/intel_adsp_ace15_mtpm.conf +++ b/samples/subsys/audio/sof/boards/intel_adsp_ace15_mtpm.conf @@ -2,7 +2,6 @@ CONFIG_INTEL_DMIC=y CONFIG_INTEL_SSP=y CONFIG_INTEL_ALH=y CONFIG_LP_MEMORY_BANKS=1 -CONFIG_HP_MEMORY_BANKS=22 CONFIG_RIMAGE_SIGNING_SCHEMA="mtl" CONFIG_IPC_MAJOR_4=y CONFIG_COMP_SRC=n diff --git a/soc/xtensa/intel_adsp/common/sram.c b/soc/xtensa/intel_adsp/common/sram.c index 22a6ec7e161..7351204e4c2 100644 --- a/soc/xtensa/intel_adsp/common/sram.c +++ b/soc/xtensa/intel_adsp/common/sram.c @@ -16,7 +16,11 @@ #define DELAY_COUNT 256 #define LPSRAM_MASK(x) 0x00000003 +#if defined(CONFIG_SOC_SERIES_INTEL_ACE1X) +#define SRAM_BANK_SIZE (128 * 1024) +#else #define SRAM_BANK_SIZE (64 * 1024) +#endif #define EBB_SEGMENT_SIZE 32 #if !defined(CONFIG_SOC_SERIES_INTEL_CAVS_V15) #define PLATFORM_INIT_HPSRAM @@ -26,7 +30,7 @@ #define PLATFORM_HPSRAM_EBB_COUNT (DT_REG_SIZE(DT_NODELABEL(sram0)) / SRAM_BANK_SIZE) BUILD_ASSERT((DT_REG_SIZE(DT_NODELABEL(sram0)) % SRAM_BANK_SIZE) == 0, - "sram0 must be divisible by 64*1024 bank size.") + "sram0 must be divisible by 64*1024 bank size."); /* * Function powers up a number of memory banks provided as an argument