diff --git a/dts/arm/st/h7/stm32h723.dtsi b/dts/arm/st/h7/stm32h723.dtsi index d6d2e07f876..14e545203b7 100644 --- a/dts/arm/st/h7/stm32h723.dtsi +++ b/dts/arm/st/h7/stm32h723.dtsi @@ -35,6 +35,11 @@ dmamux1: dmamux@40020800 { dma-requests= <129>; }; + + rng: rng@48021800 { + health-test-magic = <0x17590abc>; + health-test-config = <0xaa74>; + }; }; /* DTCM memory directly coppled to CPU */ diff --git a/dts/arm/st/h7/stm32h735.dtsi b/dts/arm/st/h7/stm32h735.dtsi index 941cfd98168..398c2a62d29 100644 --- a/dts/arm/st/h7/stm32h735.dtsi +++ b/dts/arm/st/h7/stm32h735.dtsi @@ -44,6 +44,11 @@ status = "disabled"; label = "CRYP"; }; + + rng: rng@48021800 { + health-test-magic = <0x17590abc>; + health-test-config = <0xaa74>; + }; }; /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */ diff --git a/dts/arm/st/l5/stm32l5.dtsi b/dts/arm/st/l5/stm32l5.dtsi index d81fa69d564..c738d0eae3f 100644 --- a/dts/arm/st/l5/stm32l5.dtsi +++ b/dts/arm/st/l5/stm32l5.dtsi @@ -393,6 +393,8 @@ reg = <0x420c0800 0x400>; interrupts = <94 0>; clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>; + health-test-magic = <0x17590abc>; + health-test-config = <0xa2b3>; status = "disabled"; label = "RNG"; }; diff --git a/dts/arm/st/u5/stm32u5.dtsi b/dts/arm/st/u5/stm32u5.dtsi index a5f0e2fd41b..9cc7862e9ae 100644 --- a/dts/arm/st/u5/stm32u5.dtsi +++ b/dts/arm/st/u5/stm32u5.dtsi @@ -346,6 +346,7 @@ reg = <0x420c0800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>; interrupts = <94 0>; + health-test-config = <0x9aae>; status = "disabled"; label = "RNG"; }; diff --git a/dts/arm/st/wl/stm32wl.dtsi b/dts/arm/st/wl/stm32wl.dtsi index f152c2a5459..9af81f68135 100644 --- a/dts/arm/st/wl/stm32wl.dtsi +++ b/dts/arm/st/wl/stm32wl.dtsi @@ -407,6 +407,8 @@ reg = <0x58001000 0x400>; interrupts = <52 0>; clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00040000>; + health-test-magic = <0x17590abc>; + health-test-config = <0xaa74>; status = "disabled"; label = "RNG"; };