Bluetooth: controller: remove redundant PPI channel and TIMER CC
This commit implements the SW-based radio switch for TIFS for LE Coded PHY S2 in nRF52840 with a single PPI channel and a single TIMER CC register. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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@ -351,9 +351,9 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
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/* Switching to TX after RX on LE Coded PHY. */
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u8_t ppi_en =
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle);
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI;
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u8_t cc_s2 =
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SW_SWITCH_TIMER_S2_EVTS_COMP(sw_tifs_toggle);
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SW_SWITCH_TIMER_EVTS_COMP_S2_BASE;
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u8_t ppi_dis =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
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sw_tifs_toggle);
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@ -379,6 +379,11 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(ppi_en) =
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_TASK_TX;
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/* Include PPI for S2 timing in the active group */
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
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sw_tifs_toggle)] |=
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE;
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/* Wire the Group task disable
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* to the S2 EVENTS_COMPARE.
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*/
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@ -404,17 +409,14 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
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HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_ENABLE;
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} else {
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/* Switching to TX after RX on LE 1M/2M PHY */
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u8_t ppi_en =
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle);
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u8_t ppi_dis =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
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sw_tifs_toggle);
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/* Invalidate PPI used when RXing on LE Coded PHY. */
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(ppi_en)
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= 0;
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(ppi_en)
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= 0;
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/* Exclude PPI for S2 timing from the active group */
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
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sw_tifs_toggle)] &=
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~(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE);
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/* Wire the Group task disable
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* to the default EVENTS_COMPARE.
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@ -440,18 +442,10 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
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#if defined(CONFIG_SOC_NRF52840)
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if (1) {
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u8_t ppi_en =
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(
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sw_tifs_toggle);
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u8_t ppi_dis =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
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sw_tifs_toggle);
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(
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ppi_en) = 0;
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(
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ppi_en) = 0;
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(
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ppi_dis) =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_EVT(cc);
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@ -459,6 +453,11 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
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ppi_dis) =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(
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sw_tifs_toggle);
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/* Exclude PPI for S2 timing from the active group */
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
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sw_tifs_toggle)] &=
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~(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE);
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}
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#endif /* CONFIG_SOC_NRF52840 */
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}
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@ -660,16 +659,7 @@ u32_t radio_tmr_start(u8_t trx, u32_t ticks_start, u32_t remainder)
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HAL_SW_SWITCH_TIMER_CLEAR_PPI_REGISTER_TASK =
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HAL_SW_SWITCH_TIMER_CLEAR_PPI_TASK;
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#if defined(CONFIG_SOC_NRF52840)
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_INCLUDE;
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(1)] =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE;
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#else /* CONFIG_SOC_NRF52840 */
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#if !defined(CONFIG_SOC_NRF52840)
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(0)) =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_EVT(
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@ -685,14 +675,13 @@ u32_t radio_tmr_start(u8_t trx, u32_t ticks_start, u32_t remainder)
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_TASK(
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(1)) =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(1);
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#endif /* !defined(CONFIG_SOC_NRF52840) */
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE;
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NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(1)] =
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HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE |
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HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE;
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#endif /* CONFIG_SOC_NRF52840 */
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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return remainder;
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@ -315,33 +315,21 @@ static inline void hal_radio_enable_on_tick_ppi_config_and_enable(u8_t trx)
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((u32_t)&(NRF_RADIO->TASKS_RXEN))
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#if defined(CONFIG_SOC_NRF52840)
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/* The 2 adjacent TIMER EVENTS_COMPARE event offsets used for implementing
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* SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
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* 'index' must be 0 or 1.
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*/
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#define SW_SWITCH_TIMER_S2_EVTS_COMP(index) \
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(SW_SWITCH_TIMER_EVTS_COMP_S2_BASE + index)
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/* Wire the SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event
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* to RADIO TASKS_TXEN/RXEN task.
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* 2 adjacent PPIs (16 & 17) are used for this wiring; <index> must be 0 or 1.
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*/
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE 16
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(index) \
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(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE + index)
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_INCLUDE \
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI 16
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE \
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((PPI_CHG_CH16_Included << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_EXCLUDE \
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_EXCLUDE \
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((PPI_CHG_CH16_Excluded << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE \
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((PPI_CHG_CH17_Included << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
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#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_EXCLUDE \
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((PPI_CHG_CH17_Excluded << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
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/* Cancel the SW switch timer running considering S8 timing:
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* wire the RADIO EVENTS_RATEBOOST event to SW_SWITCH_TIMER TASKS_CAPTURE task.
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*/
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#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI 18
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#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI 17
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#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_ENABLE \
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((PPI_CHENSET_CH18_Set << PPI_CHENSET_CH18_Pos) & PPI_CHENSET_CH18_Msk)
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#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_DISABLE \
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