Bluetooth: controller: remove redundant PPI channel and TIMER CC

This commit implements the SW-based radio switch for TIFS for LE
Coded PHY S2 in nRF52840 with a single PPI channel and a single
TIMER CC register.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2018-01-23 12:48:31 +01:00 committed by Carles Cufí
parent adaef465e4
commit 9d1ca9c390
2 changed files with 22 additions and 45 deletions

View File

@ -351,9 +351,9 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
/* Switching to TX after RX on LE Coded PHY. */
u8_t ppi_en =
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle);
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI;
u8_t cc_s2 =
SW_SWITCH_TIMER_S2_EVTS_COMP(sw_tifs_toggle);
SW_SWITCH_TIMER_EVTS_COMP_S2_BASE;
u8_t ppi_dis =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
sw_tifs_toggle);
@ -379,6 +379,11 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(ppi_en) =
HAL_SW_SWITCH_RADIO_ENABLE_PPI_TASK_TX;
/* Include PPI for S2 timing in the active group */
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
sw_tifs_toggle)] |=
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE;
/* Wire the Group task disable
* to the S2 EVENTS_COMPARE.
*/
@ -404,17 +409,14 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_ENABLE;
} else {
/* Switching to TX after RX on LE 1M/2M PHY */
u8_t ppi_en =
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(sw_tifs_toggle);
u8_t ppi_dis =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
sw_tifs_toggle);
/* Invalidate PPI used when RXing on LE Coded PHY. */
HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(ppi_en)
= 0;
HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(ppi_en)
= 0;
/* Exclude PPI for S2 timing from the active group */
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
sw_tifs_toggle)] &=
~(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE);
/* Wire the Group task disable
* to the default EVENTS_COMPARE.
@ -440,18 +442,10 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
#if defined(CONFIG_SOC_NRF52840)
if (1) {
u8_t ppi_en =
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(
sw_tifs_toggle);
u8_t ppi_dis =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(
sw_tifs_toggle);
HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_EVT(
ppi_en) = 0;
HAL_SW_SWITCH_RADIO_ENABLE_PPI_REGISTER_TASK(
ppi_en) = 0;
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(
ppi_dis) =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_EVT(cc);
@ -459,6 +453,11 @@ static void sw_switch(u8_t dir, u8_t phy_curr, u8_t flags_curr, u8_t phy_next,
ppi_dis) =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(
sw_tifs_toggle);
/* Exclude PPI for S2 timing from the active group */
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(
sw_tifs_toggle)] &=
~(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE);
}
#endif /* CONFIG_SOC_NRF52840 */
}
@ -660,16 +659,7 @@ u32_t radio_tmr_start(u8_t trx, u32_t ticks_start, u32_t remainder)
HAL_SW_SWITCH_TIMER_CLEAR_PPI_REGISTER_TASK =
HAL_SW_SWITCH_TIMER_CLEAR_PPI_TASK;
#if defined(CONFIG_SOC_NRF52840)
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_INCLUDE;
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(1)] =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE;
#else /* CONFIG_SOC_NRF52840 */
#if !defined(CONFIG_SOC_NRF52840)
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_EVT(
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(0)) =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_EVT(
@ -685,14 +675,13 @@ u32_t radio_tmr_start(u8_t trx, u32_t ticks_start, u32_t remainder)
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_REGISTER_TASK(
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(1)) =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_TASK(1);
#endif /* !defined(CONFIG_SOC_NRF52840) */
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(0)] =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_0_INCLUDE;
NRF_PPI->CHG[SW_SWITCH_TIMER_TASK_GROUP(1)] =
HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_1_INCLUDE |
HAL_SW_SWITCH_RADIO_ENABLE_PPI_1_INCLUDE;
#endif /* CONFIG_SOC_NRF52840 */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
return remainder;

View File

@ -315,33 +315,21 @@ static inline void hal_radio_enable_on_tick_ppi_config_and_enable(u8_t trx)
((u32_t)&(NRF_RADIO->TASKS_RXEN))
#if defined(CONFIG_SOC_NRF52840)
/* The 2 adjacent TIMER EVENTS_COMPARE event offsets used for implementing
* SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
* 'index' must be 0 or 1.
*/
#define SW_SWITCH_TIMER_S2_EVTS_COMP(index) \
(SW_SWITCH_TIMER_EVTS_COMP_S2_BASE + index)
/* Wire the SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event
* to RADIO TASKS_TXEN/RXEN task.
* 2 adjacent PPIs (16 & 17) are used for this wiring; <index> must be 0 or 1.
*/
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE 16
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI(index) \
(HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE + index)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_INCLUDE \
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI 16
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_INCLUDE \
((PPI_CHG_CH16_Included << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_0_EXCLUDE \
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_EXCLUDE \
((PPI_CHG_CH16_Excluded << PPI_CHG_CH16_Pos) & PPI_CHG_CH16_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_INCLUDE \
((PPI_CHG_CH17_Included << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
#define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_1_EXCLUDE \
((PPI_CHG_CH17_Excluded << PPI_CHG_CH17_Pos) & PPI_CHG_CH17_Msk)
/* Cancel the SW switch timer running considering S8 timing:
* wire the RADIO EVENTS_RATEBOOST event to SW_SWITCH_TIMER TASKS_CAPTURE task.
*/
#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI 18
#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI 17
#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_ENABLE \
((PPI_CHENSET_CH18_Set << PPI_CHENSET_CH18_Pos) & PPI_CHENSET_CH18_Msk)
#define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI_DISABLE \