diff --git a/soc/arm/gigadevice/gd32f4xx/CMakeLists.txt b/soc/arm/gigadevice/gd32f4xx/CMakeLists.txt new file mode 100644 index 00000000000..9d80226466c --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2021, Teslabs Engineering S.L. +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) +zephyr_sources(soc.c) diff --git a/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.gd32f450 b/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.gd32f450 new file mode 100644 index 00000000000..6a07897740b --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.gd32f450 @@ -0,0 +1,11 @@ +# Copyright (c) 2021, Teslabs Engineering S.L. +# SPDX-License-Identifier: Apache-2.0 + +config SOC + default "gd32f450" + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 200000000 + +config NUM_IRQS + default 91 diff --git a/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.series b/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.series new file mode 100644 index 00000000000..f5ef03cd276 --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.series @@ -0,0 +1,11 @@ +# Copyright (c) 2021, Teslabs Engineering S.L. +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_GD32F4XX + +source "soc/arm/gigadevice/gd32f4xx/Kconfig.defconfig.gd32*" + +config SOC_SERIES + default "gd32f4xx" + +endif # SOC_SERIES_GD32F4XX diff --git a/soc/arm/gigadevice/gd32f4xx/Kconfig.series b/soc/arm/gigadevice/gd32f4xx/Kconfig.series new file mode 100644 index 00000000000..7fcfca92581 --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/Kconfig.series @@ -0,0 +1,12 @@ +# Copyright (c) 2021, Teslabs Engineering S.L. +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_GD32F4XX + bool "GigaDevice GD32F4XX series Cortex-M4F MCU" + select ARM + select CPU_HAS_ARM_MPU + select CPU_HAS_FPU + select CPU_CORTEX_M4 + select SOC_FAMILY_GD32_ARM + help + Enable support for GigaDevice GD32F4XX MCU series diff --git a/soc/arm/gigadevice/gd32f4xx/Kconfig.soc b/soc/arm/gigadevice/gd32f4xx/Kconfig.soc new file mode 100644 index 00000000000..1a439a347c9 --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/Kconfig.soc @@ -0,0 +1,11 @@ +# Copyright (c) 2021, Teslabs Engineering S.L. +# SPDX-License-Identifier: Apache-2.0 + +choice + prompt "GigaDevice GD32F4XX MCU Selection" + depends on SOC_SERIES_GD32F4XX + + config SOC_GD32F450 + bool "gd32f450" + +endchoice diff --git a/soc/arm/gigadevice/gd32f4xx/linker.ld b/soc/arm/gigadevice/gd32f4xx/linker.ld new file mode 100644 index 00000000000..d51a91910fe --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/linker.ld @@ -0,0 +1,6 @@ +/* + * Copyright (c) 2021 Teslabs Engineering S.L. + * SPDX-License-Identifier: Apache-2.0 + */ + +#include diff --git a/soc/arm/gigadevice/gd32f4xx/soc.c b/soc/arm/gigadevice/gd32f4xx/soc.c new file mode 100644 index 00000000000..a7824b052fc --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/soc.c @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2021, Teslabs Engineering S.L. + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +static int gd32f4xx_soc_init(const struct device *dev) +{ + uint32_t key; + + ARG_UNUSED(dev); + + key = irq_lock(); + + SystemInit(); + NMI_INIT(); + + irq_unlock(key); + + return 0; +} + +SYS_INIT(gd32f4xx_soc_init, PRE_KERNEL_1, 0); diff --git a/soc/arm/gigadevice/gd32f4xx/soc.h b/soc/arm/gigadevice/gd32f4xx/soc.h new file mode 100644 index 00000000000..16f546e090f --- /dev/null +++ b/soc/arm/gigadevice/gd32f4xx/soc.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2021, Teslabs Engineering S.L. + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef _SOC_ARM_GIGADEVICE_GD32F4XX_SOC_H_ +#define _SOC_ARM_GIGADEVICE_GD32F4XX_SOC_H_ + +#ifndef _ASMLANGUAGE + +#include +#include + +#endif /* _ASMLANGUAGE */ + +#endif /* _SOC_ARM_GIGADEVICE_GD32F4XX_SOC_H_ */