From 95cd021ceabc5e482ee8ce2c0d2f75255282dac7 Mon Sep 17 00:00:00 2001 From: Flavio Ceolin Date: Fri, 2 Apr 2021 16:42:16 -0700 Subject: [PATCH] arch: arm: Fix 14.4 guideline violation The controlling expression of an if statement has to be an essentially boolean type. Signed-off-by: Flavio Ceolin --- arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c | 4 ++-- arch/arm/core/aarch32/cortex_m/fault.c | 4 ++-- arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h | 2 +- arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c | 2 +- arch/arm/core/aarch32/thread.c | 2 +- include/arch/arm/aarch32/asm_inline_gcc.h | 4 ++-- include/arch/arm/aarch32/irq.h | 2 +- 7 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c b/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c index acf1e889be1..168add1e815 100644 --- a/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c +++ b/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c @@ -45,7 +45,7 @@ static int arm_cmse_addr_range_read_write_ok(uint32_t addr, uint32_t size, { int flags = 0; - if (force_npriv) { + if (force_npriv != 0) { flags |= CMSE_MPU_UNPRIV; } if (rw) { @@ -141,7 +141,7 @@ static int arm_cmse_addr_range_nonsecure_read_write_ok(uint32_t addr, uint32_t s { int flags = CMSE_NONSECURE; - if (force_npriv) { + if (force_npriv != 0) { flags |= CMSE_MPU_UNPRIV; } if (rw) { diff --git a/arch/arm/core/aarch32/cortex_m/fault.c b/arch/arm/core/aarch32/cortex_m/fault.c index f7bc2b5ef2e..fc52d93ba4d 100644 --- a/arch/arm/core/aarch32/cortex_m/fault.c +++ b/arch/arm/core/aarch32/cortex_m/fault.c @@ -243,7 +243,7 @@ static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault, if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) { mmfar = temp; PR_EXC(" MMFAR Address: 0x%x", mmfar); - if (from_hard_fault) { + if (from_hard_fault != 0) { /* clear SCB_MMAR[VALID] to reset */ SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk; } @@ -381,7 +381,7 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) { PR_EXC(" BFAR Address: 0x%x", bfar); - if (from_hard_fault) { + if (from_hard_fault != 0) { /* clear SCB_CFSR_BFAR[VALID] to reset */ SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk; } diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h index 53a98339b78..9a0c9f563cf 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h @@ -242,7 +242,7 @@ static inline int is_user_accessible_region(uint32_t r_index, int write) uint32_t r_ap = get_region_ap(r_index); - if (write) { + if (write != 0) { return r_ap == P_RW_U_RW; } diff --git a/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c b/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c index 313a18130b9..52da38614e0 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c +++ b/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c @@ -526,7 +526,7 @@ static inline int is_user_accessible_region(uint32_t r_index, int write) { uint32_t r_ap = SYSMPU->WORD[r_index][2]; - if (write) { + if (write != 0) { return (r_ap & MPU_REGION_WRITE) == MPU_REGION_WRITE; } diff --git a/arch/arm/core/aarch32/thread.c b/arch/arm/core/aarch32/thread.c index 6978b8bd0bc..7181b4330b0 100644 --- a/arch/arm/core/aarch32/thread.c +++ b/arch/arm/core/aarch32/thread.c @@ -358,7 +358,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp #if defined(CONFIG_MULTITHREADING) const struct k_thread *thread = _current; - if (!thread) { + if (thread == NULL) { return 0; } #endif diff --git a/include/arch/arm/aarch32/asm_inline_gcc.h b/include/arch/arm/aarch32/asm_inline_gcc.h index f665879093b..d53edb57575 100644 --- a/include/arch/arm/aarch32/asm_inline_gcc.h +++ b/include/arch/arm/aarch32/asm_inline_gcc.h @@ -84,7 +84,7 @@ static ALWAYS_INLINE unsigned int arch_irq_lock(void) static ALWAYS_INLINE void arch_irq_unlock(unsigned int key) { #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) - if (key) { + if (key != 0U) { return; } __asm__ volatile( @@ -97,7 +97,7 @@ static ALWAYS_INLINE void arch_irq_unlock(unsigned int key) "isb;" : : "r"(key) : "memory"); #elif defined(CONFIG_ARMV7_R) - if (key) { + if (key != 0U) { return; } __asm__ volatile( diff --git a/include/arch/arm/aarch32/irq.h b/include/arch/arm/aarch32/irq.h index 84880b965fd..06b7681afc5 100644 --- a/include/arch/arm/aarch32/irq.h +++ b/include/arch/arm/aarch32/irq.h @@ -147,7 +147,7 @@ static inline void arch_isr_direct_footer(int maybe_swap) #ifdef CONFIG_TRACING sys_trace_isr_exit(); #endif - if (maybe_swap) { + if (maybe_swap != 0) { z_arm_int_exit(); } }